Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
This is an open-source RTL project for a simple DWORD burst interface to a Cypress S27KL0641DABHI020 64Mbit HyperRAM.
Also included is a dual-PMOD PCB adapter design.
@OSHPark Shared Project: https://oshpark.com/shared_projects/oZ3pCvob
Kevin Hubbard - Black Mesa Labs 2018.04.28