GuillemCabo

Pinned Repositories

• A_Formal_Tale_Chapter_I_AMBA

  AXI Formal Verification IP

  Language:SystemVerilog0100

• AHB2

  AMBA AHB 2.0 VIP in SystemVerilog UVM

  Language:SystemVerilog0100

• AMBA_AXI_AHB_APB

  AMBA bus lecture material

  Language:Verilog0100

• ArduinoCore-samd

  Arduino Core for SAMD21 CPU

  Language:C0100

• ASIC_watch

  Verilog code for 4 digit watch

  Language:Verilog0300

• asic_watch_mpw4

  Language:Verilog0300

• hyperram

  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC

  Language:Verilog3101

• spyglass2latex

  Script to parse spyglass port reports to latex tables

  Language:Python2200

• Stm32f411_RPI3_spi_test

  Test of DMA comunication. RPI3 master, stm32 slave.

  Language:C1101

GuillemCabo's Repositories