Pinned Repositories
CNN-On-FPGA
FPGA
CS-BAOYAN-2023
FPGA-CNN-accelerator-based-on-systolic-array
2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器，支持yolov3-tiny的第一层卷积层计算，可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。
FPGA_Competition-RISC-V_Processor-in-PGL22G
FPGA Innovation Design Competition：RISC-V Processor-based Hardware and Software Design in PGL22G
GuoningHuang
Integrated-Circuit-Textbooks
Collect some IC textbooks for learning.
LeNet-CNN-Accelerator-Hardware-for-FPGA
An open source Verilog Based LeNet-1 Parallel CNNs Accelerator for FPGAs in Vivado 2017
pynq-kv260-dfx
Demos using kv260 and pynq to implement simple DFX(dynamic function exchange). Including DFX between add and sub,DFX between matrix multiplication and element-wise (dot) multiplication.
FPGA_Competition-RISC-V_Processor-in-PGL22G
FPGA Innovation Design Competition：RISC-V Processor-based Hardware and Software Design in PGL22G
.github
GuoningHuang's Repositories
GuoningHuang/FPGA-CNN-accelerator-based-on-systolic-array
2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器，支持yolov3-tiny的第一层卷积层计算，可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。
GuoningHuang/CNN-On-FPGA
FPGA
GuoningHuang/LeNet-CNN-Accelerator-Hardware-for-FPGA
An open source Verilog Based LeNet-1 Parallel CNNs Accelerator for FPGAs in Vivado 2017
GuoningHuang/CS-BAOYAN-2023
GuoningHuang/FPGA_Competition-RISC-V_Processor-in-PGL22G
FPGA Innovation Design Competition：RISC-V Processor-based Hardware and Software Design in PGL22G
GuoningHuang/pynq-kv260-dfx
Demos using kv260 and pynq to implement simple DFX(dynamic function exchange). Including DFX between add and sub,DFX between matrix multiplication and element-wise (dot) multiplication.
GuoningHuang/GuoningHuang
GuoningHuang/Integrated-Circuit-Textbooks
Collect some IC textbooks for learning.