WELCOME TO MY 100DAYSOFRTL
My Name is Ummidi Chandrika, I mostly use Xilinx ISE 14.7 Design Suite and sometimes Modelsim software for the simulation of RTL Codes. And The Synthesis is performed by using Intel Quartus Prime Software.
Here is the list of Day wise RTL Codes:
Day 1 : Clock Divider
Day 2 : Johnson Counter
Day 3: Ring Counter
Day 4: 5 Input Majority Circuit
Day 5: Parity Generator
Day 6: Binary to One Hot Encoder
Day 7: 4-bit BCD Synchronous Counter
Day 8: 4-bit Carry LookAhead Adder
Day 9: N-bit Comparator
Day 10: Serial in Serial Out Shift Register
Day 11: Serial in Parallel Out Shift Register
Day 12: Parallel in Parallel Out Register
Day 13: Parallel In Serial Out Register
Day 14: Bidirection Shift Register
Day 15: PRBS Sequence Generator
Day 16: 8-Bit Subtractor
Day 17: 8-Bit Adder/Subtractor
Day 18: 4-bit Multiplier
Day 19: Fixed Point Division
Day 20: Master Slave JK Flip Flop
Day 21: Positive Edge Detector
Day 22: BCD adder
Day 23: 4-bit Carry Select Adder
Day 24: Moore FSM 1010 Sequence detector
Day 25: N:1 Mux
Day 26: BCD TimeCount
Day 27: 3-1 Mux
Day 28: BCD to Seven Segment Display
Day 29: D Latch using 2:1 MUX
Day 30: 8-Bit Barrel Shifter
Day 31: 1-bit Comparator using 4X1 Mux
Day 32: Logical, Algebraic, and Rotate Shift Operations
Day 33: ALU
Day 34: 4-Bit Asynchronous Down Counter
Day 35: Mod-N UpDown Counter
Day 36: Universal Binary Counter
Day 37: Universal Shift Register
Day 38: CN( Change-No change Flipflop) using 2:1 Mux
Day 39: Frequency divider by odd Numbers
Day 40: Greatest Common Divisor using Behavioural Modelling
Day 41: Greatest Common Divisor via FSM
Day 42: Single Port RAM
Day 43: Dual Port RAM
Day 44: Clock Buffer
Day 45: Synchronous FIFO
Day 46: Priority Encoder
Day 47: Seven Segment Display Using ROM
Day 48: Serial Adder
Day 49: Fixed Priority Arbiter
Day 50: Round Robin Arbiter
SYSTEM VERILOG
Day 51: TB Hello World https://www.edaplayground.com/x/KMMH
Day 52: TB LOgic Data Type https://www.edaplayground.com/x/fhpJ
Day 53: TB Unpacked Struct Data Type
Day 54:TB Packed Struct Data Type
Day 55: TB Arrays
Day 56: TB Functions https://www.edaplayground.com/x/KCDd
Day 57: TB Tasks https://www.edaplayground.com/x/8wRJ
Day 58: TB Interfaces https://www.edaplayground.com/x/WXZj
Day 59: TB Object Assignment & Shallow Copy Methods https://www.edaplayground.com/x/7qUQ
Day 60: TB Deep Copy Method https://www.edaplayground.com/x/Fj5c
Day 61: TB Inheritance https://www.edaplayground.com/x/Bwj3
Day 62: TB Polymorphism https://www.edaplayground.com/x/CkqF
Day 63: TB to Verify Static Function and FUnction Static Methods https://www.edaplayground.com/x/PpHC
Day 64: TB to verify Parameterized Class https://www.edaplayground.com/x/BzrE
Day 65: TB to verify Randomization https://www.edaplayground.com/x/JdvY
Day 66: TB Interface to Verify Clocking Blocks https://www.edaplayground.com/x/Lm4W
Day 67: TB Fork-Join None https://www.edaplayground.com/x/Jgh9
Day 68: TB Fork- Join https://www.edaplayground.com/x/GVus
Day 69: TB Fork - Join Any https://www.edaplayground.com/x/vnBD
Day 70: TB Events https://www.edaplayground.com/x/Ac9G
Day 71 : TB Mailbox Example-1 https://www.edaplayground.com/x/AWbU
Day 72: TB for Sending Transaction Data with Mailbox https://www.edaplayground.com/x/MpBg
Day 73: TB Parameterized Mailbox https://www.edaplayground.com/x/6kNx
Day 74: TB Semaphore https://www.edaplayground.com/x/UsBu
Day 75- TB Wait Fork
Day 76- TB Automatic Variables https://www.edaplayground.com/x/LayF
Day 77: TB to Verify D-Flipflop https://www.edaplayground.com/x/VTk5
Day 78 :TB to Verify Half Adder https://www.edaplayground.com/x/ie4d
Day 79: TB to Verify Full adder https://www.edaplayground.com/x/r_wr
Day 80: TB to Verify 4:1 Multiplexer https://www.edaplayground.com/x/wCSh
Day 81: TB to Verify Full Subtractor https://www.edaplayground.com/x/k_Lu
day 82: TB to Verify 3:8 Decoder https://www.edaplayground.com/x/YuXi
Day 83: TB to Verify Priority Encoder https://www.edaplayground.com/x/Q4iB
Day 84: TB to Verify 1:4 Demultiplexer https://www.edaplayground.com/x/8dQ8
Day 85 : TB to Verify FIFO https://www.edaplayground.com/x/SJB6
Day 86: TB to Verify Binary to Gray Converter https://www.edaplayground.com/x/UtKp
Day 87: TB to Verify Gray to Binary Converter https://www.edaplayground.com/x/hr25
Day 88: TB to Verify Tristate Buffer https://www.edaplayground.com/x/LC6j
Day 89: TB to Verify T-Flipflop https://www.edaplayground.com/x/dXjN
Day 90: TB to Verify ALU https://www.edaplayground.com/x/fD9y
Day 91- TB to Verify Self Reloading Counter https://www.edaplayground.com/x/e34Q
Day 92" TB to Verify Priority Arbiter https://www.edaplayground.com/x/U_qk
Day 93 : Constraint to generate the below pattern in dynamic array ? 0 1 0 2 0 3 0 4 0 5 0 https://www.edaplayground.com/x/Av5M
Day 94 : Constraint for 2D 3D for dynamic array to print consecutive elements https://www.edaplayground.com/x/gQjb
Day 95 : Identify how many number of zeros count in an array / number of ones count in an array https://www.edaplayground.com/x/KL4m
Day 96: TB Constraint to generate a pattern 0102030405 https://www.edaplayground.com/x/KM2L
Day 97: TB Constraint to generate unique numbers between 99 to 100 https://www.edaplayground.com/x/KM3D
Day 98: TB Constraint to Generate Pattern 0, 2, 1, 3, 4, 6, 5, 7, 8 https://www.edaplayground.com/x/fAiN
Day 99: TB to Verify CoverGroup in Functional Coverage https://www.edaplayground.com/x/k9CG
Day 100: Functional Coverage https://www.edaplayground.com/x/QSij