I needed a complete and recent list of all x86 instructions with their signatures and descriptions for a personal project (AsmDude). Intel's x86 Instruction Set Reference documentation (found here) has all this information, but it does not provide a method to query the information. The html pages generated by the original code (found here) could be transformed by a small Java program to extract the information I needed.
The set is also available online at https://hjlebbink.github.io/x86doc/.
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Updated with Intel's documentation of June 2016
| AAA | ASCII Adjust After Addition | |
| AAD | ASCII Adjust AX Before Division | |
| AAM | ASCII Adjust AX After Multiply | |
| AAS | ASCII Adjust AL After Subtraction | |
| ADC | Add with Carry | |
| ADCX | Unsigned Integer Addition of Two Operands with Carry Flag | ADX |
| ADD | Add | |
| ADDPD | Add Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| ADDPS | Add Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| ADDSD | Add Scalar Double-Precision Floating-Point Values | AVX, AVX512F, SSE2 |
| ADDSS | Add Scalar Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| ADDSUBPD | Packed Double-FP Add/Subtract | AVX, SSE3 |
| ADDSUBPS | Packed Single-FP Add/Subtract | AVX, SSE3 |
| ADOX | Unsigned Integer Addition of Two Operands with Overflow Flag | ADX |
| AESDEC | Perform One Round of an AES Decryption Flow | AES, AVX |
| AESDECLAST | Perform Last Round of an AES Decryption Flow | AES, AVX |
| AESENC | Perform One Round of an AES Encryption Flow | AES, AVX |
| AESENCLAST | Perform Last Round of an AES Encryption Flow | AES, AVX |
| AESIMC | Perform the AES InvMixColumn Transformation | AES, AVX |
| AESKEYGENASSIST | AES Round Key Generation Assist | AES, AVX |
| AND | Logical AND | |
| ANDN | Logical AND NOT | BMI1 |
| ANDNPD | Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE2 |
| ANDNPS | Bitwise Logical AND NOT of Packed Single Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE |
| ANDPD | Bitwise Logical AND of Packed Double Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE2 |
| ANDPS | Bitwise Logical AND of Packed Single Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE |
| ARPL | Adjust RPL Field of Segment Selector | |
| BEXTR | Bit Field Extract | |
| BLENDPD | Blend Packed Double Precision Floating-Point Values | AVX, SSE4_1 |
| BLENDPS | Blend Packed Single Precision Floating-Point Values | AVX, SSE4_1 |
| BLENDVPD | Variable Blend Packed Double Precision Floating-Point Values | AVX, SSE4_1 |
| BLENDVPS | Variable Blend Packed Single Precision Floating-Point Values | AVX, SSE4_1 |
| BLSI | Extract Lowest Set Isolated Bit | BMI1 |
| BLSMSK | Get Mask Up to Lowest Set Bit | BMI1 |
| BLSR | Reset Lowest Set Bit | BMI1 |
| BNDCL | Check Lower Bound | MPX |
| BNDCN | Check Upper Bound | MPX |
| BNDCU | Check Upper Bound | MPX |
| BNDLDX | Load Extended Bounds Using Address Translation | MPX |
| BNDMK | Make Bounds | MPX |
| BNDMOV | Move Bounds | MPX |
| BNDSTX | Store Extended Bounds Using Address Translation | MPX |
| BOUND | Check Array Index Against Bounds | |
| BSF | Bit Scan Forward | |
| BSR | Bit Scan Reverse | |
| BSWAP | Byte Swap | |
| BT | Bit Test | |
| BTC | Bit Test and Complement | |
| BTR | Bit Test and Reset | |
| BTS | Bit Test and Set | |
| BZHI | Zero High Bits Starting with Specified Bit Position | |
| CALL | Call Procedure | |
| CBW | Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword | |
| CDQ | Convert Word to Doubleword/Convert Doubleword to Quadword | |
| CDQE | Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword | |
| CLAC | Clear AC Flag in EFLAGS Register | |
| CLC | Clear Carry Flag | |
| CLD | Clear Direction Flag | |
| CLFLUSH | Flush Cache Line | |
| CLFLUSHOPT | Flush Cache Line Optimized | |
| CLI | Clear Interrupt Flag | |
| CLTS | Clear Task-Switched Flag in CR0 | |
| CMC | Complement Carry Flag | |
| CMOVA | Conditional Move | |
| CMOVAE | Conditional Move | |
| CMOVB | Conditional Move | |
| CMOVBE | Conditional Move | |
| CMOVC | Conditional Move | |
| CMOVE | Conditional Move | |
| CMOVG | Conditional Move | |
| CMOVGE | Conditional Move | |
| CMOVL | Conditional Move | |
| CMOVLE | Conditional Move | |
| CMOVNA | Conditional Move | |
| CMOVNAE | Conditional Move | |
| CMOVNB | Conditional Move | |
| CMP | Compare Two Operands | |
| CMPPD | Compare Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| CMPPS | Compare Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| CMPS | Compare String Operands | |
| CMPSB | Compare String Operands | |
| CMPSD | Compare String Operands | |
| CMPSQ | Compare String Operands | |
| CMPSS | Compare Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| CMPSW | Compare String Operands | |
| CMPXCHG | Compare and Exchange | |
| CMPXCHG16B | Compare and Exchange Bytes | |
| CMPXCHG8B | Compare and Exchange Bytes | |
| COMISD | Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS | AVX, AVX512F, SSE2 |
| COMISS | Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS | AVX, AVX512F, SSE |
| CPUID | CPU Identification | |
| CQO | Convert Word to Doubleword/Convert Doubleword to Quadword | |
| CRC32 | Accumulate CRC32 Value | |
| CVTDQ2PD | Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| CVTDQ2PS | Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| CVTPD2DQ | Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers | AVX, AVX512F, AVX512VL, SSE2 |
| CVTPD2PI | Convert Packed Double-Precision FP Values to Packed Dword Integers | |
| CVTPD2PS | Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| CVTPI2PD | Convert Packed Dword Integers to Packed Double-Precision FP Values | |
| CVTPI2PS | Convert Packed Dword Integers to Packed Single-Precision FP Values | |
| CVTPS2DQ | Convert Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values | AVX, AVX512F, AVX512VL, SSE2 |
| CVTPS2PD | Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| CVTPS2PI | Convert Packed Single-Precision FP Values to Packed Dword Integers | |
| CVTSD2SI | Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer | AVX, AVX512F, SSE2 |
| CVTSD2SS | Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| CVTSI2SD | Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| CVTSI2SS | Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| CVTSS2SD | Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| CVTSS2SI | Convert Scalar Single-Precision Floating-Point Value to Doubleword Integer | AVX, AVX512F, SSE |
| CVTTPD2DQ | Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers | AVX, AVX512F, AVX512VL, SSE2 |
| CVTTPD2PI | Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers | |
| CVTTPS2DQ | Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values | AVX, AVX512F, AVX512VL, SSE2 |
| CVTTPS2PI | Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers | |
| CVTTSD2SI | Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Integer | AVX, AVX512F, SSE2 |
| CVTTSS2SI | Convert with Truncation Scalar Single-Precision Floating-Point Value to Integer | AVX, AVX512F, SSE |
| CWD | Convert Word to Doubleword/Convert Doubleword to Quadword | |
| CWDE | Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword | |
| DAA | Decimal Adjust AL after Addition | |
| DAS | Decimal Adjust AL after Subtraction | |
| DEC | Decrement by 1 | |
| DIV | Unsigned Divide | |
| DIVPD | Divide Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| DIVPS | Divide Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| DIVSD | Divide Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| DIVSS | Divide Scalar Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| DPPD | Dot Product of Packed Double Precision Floating-Point Values | AVX, SSE4_1 |
| DPPS | Dot Product of Packed Single Precision Floating-Point Values | AVX, SSE4_1 |
| EMMS | Empty MMX Technology State | |
| ENTER | Make Stack Frame for Procedure Parameters | |
| EXTRACTPS | Extract Packed Floating-Point Values | AVX, AVX512F, SSE4_1 |
| F2XM1 | Compute 2x–1 | |
| FABS | Absolute Value | |
| FADD | Add | |
| FADDP | Add | |
| FBLD | Load Binary Coded Decimal | |
| FBSTP | Store BCD Integer and Pop | |
| FCHS | Change Sign | |
| FCLEX | Clear Exceptions | |
| FCMOVB | Floating-Point Conditional Move | |
| FCMOVBE | Floating-Point Conditional Move | |
| FCMOVE | Floating-Point Conditional Move | |
| FCMOVNB | Floating-Point Conditional Move | |
| FCMOVNBE | Floating-Point Conditional Move | |
| FCMOVNE | Floating-Point Conditional Move | |
| FCMOVU | Floating-Point Conditional Move | |
| FCOM | Compare Floating Point Values | |
| FCOMI | Compare Floating Point Values and Set EFLAGS | |
| FCOMIP | Compare Floating Point Values and Set EFLAGS | |
| FCOMP | Compare Floating Point Values | |
| FCOMPP | Compare Floating Point Values | |
| FCOS | Cosine | |
| FDECSTP | Decrement Stack-Top Pointer | |
| FDIV | Divide | |
| FDIVP | Divide | |
| FDIVR | Reverse Divide | |
| FDIVRP | Reverse Divide | |
| FFREE | Free Floating-Point Register | |
| FIADD | Add | |
| FICOM | Compare Integer | |
| FICOMP | Compare Integer | |
| FIDIV | Divide | |
| FIDIVR | Reverse Divide | |
| FILD | Load Integer | |
| FIMUL | Multiply | |
| FINCSTP | Increment Stack-Top Pointer | |
| FINIT | Initialize Floating-Point Unit | |
| FIST | Store Integer | |
| FISTP | Store Integer | |
| FISTTP | Store Integer with Truncation | |
| FISUB | Subtract | |
| FISUBR | Reverse Subtract | |
| FLD | Load Floating Point Value | |
| FLD1 | Load Constant | |
| FLDCW | Load x87 FPU Control Word | |
| FLDENV | Load x87 FPU Environment | |
| FLDL2E | Load Constant | |
| FLDL2T | Load Constant | |
| FLDLG2 | Load Constant | |
| FLDLN2 | Load Constant | |
| FLDPI | Load Constant | |
| FLDZ | Load Constant | |
| FMUL | Multiply | |
| FMULP | Multiply | |
| FNCLEX | Clear Exceptions | |
| FNINIT | Initialize Floating-Point Unit | |
| FNOP | No Operation | |
| FNSAVE | Store x87 FPU State | |
| FNSTCW | Store x87 FPU Control Word | |
| FNSTENV | Store x87 FPU Environment | |
| FNSTSW | Store x87 FPU Status Word | |
| FPATAN | Partial Arctangent | |
| FPREM | Partial Remainder | |
| FPREM1 | Partial Remainder | |
| FPTAN | Partial Tangent | |
| FRNDINT | Round to Integer | |
| FRSTOR | Restore x87 FPU State | |
| FSAVE | Store x87 FPU State | |
| FSCALE | Scale | |
| FSIN | Sine | |
| FSINCOS | Sine and Cosine | |
| FSQRT | Square Root | |
| FST | Store Floating Point Value | |
| FSTCW | Store x87 FPU Control Word | |
| FSTENV | Store x87 FPU Environment | |
| FSTP | Store Floating Point Value | |
| FSTSW | Store x87 FPU Status Word | |
| FSUB | Subtract | |
| FSUBP | Subtract | |
| FSUBR | Reverse Subtract | |
| FSUBRP | Reverse Subtract | |
| FTST | TEST | |
| FUCOM | Unordered Compare Floating Point Values | |
| FUCOMI | Compare Floating Point Values and Set EFLAGS | |
| FUCOMIP | Compare Floating Point Values and Set EFLAGS | |
| FUCOMP | Unordered Compare Floating Point Values | |
| FUCOMPP | Unordered Compare Floating Point Values | |
| FWAIT | Wait | |
| FXAM | Examine Floating-Point | |
| FXCH | Exchange Register Contents | |
| FXRSTOR | Restore x87 FPU, MMX, XMM, and MXCSR State | |
| FXSAVE | Save x87 FPU, MMX Technology, and SSE State | |
| FXTRACT | Extract Exponent and Significand | |
| FYL2X | Compute y ∗ log2x | |
| FYL2XP1 | Compute y ∗ log2(x +1) | |
| HADDPD | Packed Double-FP Horizontal Add | AVX, SSE3 |
| HADDPS | Packed Single-FP Horizontal Add | AVX, SSE3 |
| HLT | Halt | |
| HSUBPD | Packed Double-FP Horizontal Subtract | AVX, SSE3 |
| HSUBPS | Packed Single-FP Horizontal Subtract | AVX, SSE3 |
| IDIV | Signed Divide | |
| IMUL | Signed Multiply | |
| IN | Input from Port | |
| INC | Increment by 1 | |
| INS | Input from Port to String | |
| INSB | Input from Port to String | |
| INSD | Input from Port to String | |
| INSERTPS | Insert Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE4_1 |
| INSW | Input from Port to String | |
| INT | Call to Interrupt Procedure | |
| INT 3 | Call to Interrupt Procedure | |
| INTO | Call to Interrupt Procedure | |
| INVD | Invalidate Internal Caches | |
| INVLPG | Invalidate TLB Entries | |
| INVPCID | Invalidate Process-Context Identifier | INVPCID |
| IRET | Interrupt Return | |
| IRETD | Interrupt Return | |
| JA | Jump if Condition Is Met | |
| JAE | Jump if Condition Is Met | |
| JB | Jump if Condition Is Met | |
| JBE | Jump if Condition Is Met | |
| JC | Jump if Condition Is Met | |
| JCXZ | Jump if Condition Is Met | |
| JE | Jump if Condition Is Met | |
| JECXZ | Jump if Condition Is Met | |
| JG | Jump if Condition Is Met | |
| JGE | Jump if Condition Is Met | |
| JL | Jump if Condition Is Met | |
| JLE | Jump if Condition Is Met | |
| JMP | Jump | |
| JNA | Jump if Condition Is Met | |
| JNAE | Jump if Condition Is Met | |
| JNB | Jump if Condition Is Met | |
| JNBE | Jump if Condition Is Met | |
| JNC | Jump if Condition Is Met | |
| JNE | Jump if Condition Is Met | |
| JNG | Jump if Condition Is Met | |
| JNGE | Jump if Condition Is Met | |
| JNL | Jump if Condition Is Met | |
| JNLE | Jump if Condition Is Met | |
| JNO | Jump if Condition Is Met | |
| JNP | Jump if Condition Is Met | |
| JNS | Jump if Condition Is Met | |
| JNZ | Jump if Condition Is Met | |
| JO | Jump if Condition Is Met | |
| JP | Jump if Condition Is Met | |
| JPE | Jump if Condition Is Met | |
| JPO | Jump if Condition Is Met | |
| JRCXZ | Jump if Condition Is Met | |
| JS | Jump if Condition Is Met | |
| JZ | Jump if Condition Is Met | |
| KADDB | ADD Two Masks | AVX512BW, AVX512DQ |
| KADDD | ADD Two Masks | AVX512BW, AVX512DQ |
| KADDQ | ADD Two Masks | AVX512BW, AVX512DQ |
| KADDW | ADD Two Masks | AVX512BW, AVX512DQ |
| KANDB | Bitwise Logical AND Masks | AVX512BW, AVX512DQ, AVX512F |
| KANDD | Bitwise Logical AND Masks | AVX512BW, AVX512DQ, AVX512F |
| KANDNB | Bitwise Logical AND NOT Masks | AVX512BW, AVX512DQ, AVX512F |
| KANDND | Bitwise Logical AND NOT Masks | AVX512BW, AVX512DQ, AVX512F |
| KANDNQ | Bitwise Logical AND NOT Masks | AVX512BW, AVX512DQ, AVX512F |
| KANDNW | Bitwise Logical AND NOT Masks | AVX512BW, AVX512DQ, AVX512F |
| KANDQ | Bitwise Logical AND Masks | AVX512BW, AVX512DQ, AVX512F |
| KANDW | Bitwise Logical AND Masks | AVX512BW, AVX512DQ, AVX512F |
| KMOVB | Move from and to Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KMOVD | Move from and to Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KMOVQ | Move from and to Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KMOVW | Move from and to Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KNOTB | NOT Mask Register | AVX512BW, AVX512DQ, AVX512F |
| KNOTD | NOT Mask Register | AVX512BW, AVX512DQ, AVX512F |
| KNOTQ | NOT Mask Register | AVX512BW, AVX512DQ, AVX512F |
| KNOTW | NOT Mask Register | AVX512BW, AVX512DQ, AVX512F |
| KORB | Bitwise Logical OR Masks | AVX512BW, AVX512DQ, AVX512F |
| KORD | Bitwise Logical OR Masks | AVX512BW, AVX512DQ, AVX512F |
| KORQ | Bitwise Logical OR Masks | AVX512BW, AVX512DQ, AVX512F |
| KORTESTB | OR Masks And Set Flags | AVX512BW, AVX512DQ, AVX512F |
| KORTESTD | OR Masks And Set Flags | AVX512BW, AVX512DQ, AVX512F |
| KORTESTQ | OR Masks And Set Flags | AVX512BW, AVX512DQ, AVX512F |
| KORTESTW | OR Masks And Set Flags | AVX512BW, AVX512DQ, AVX512F |
| KORW | Bitwise Logical OR Masks | AVX512BW, AVX512DQ, AVX512F |
| KSHIFTLB | Shift Left Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KSHIFTLD | Shift Left Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KSHIFTLQ | Shift Left Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KSHIFTLW | Shift Left Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KSHIFTRB | Shift Right Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KSHIFTRD | Shift Right Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KSHIFTRQ | Shift Right Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KSHIFTRW | Shift Right Mask Registers | AVX512BW, AVX512DQ, AVX512F |
| KTESTB | Packed Bit Test Masks and Set Flags | AVX512BW, AVX512DQ |
| KTESTD | Packed Bit Test Masks and Set Flags | AVX512BW, AVX512DQ |
| KTESTQ | Packed Bit Test Masks and Set Flags | AVX512BW, AVX512DQ |
| KTESTW | Packed Bit Test Masks and Set Flags | AVX512BW, AVX512DQ |
| KUNPCKBW | Unpack for Mask Registers | AVX512BW, AVX512F |
| KUNPCKDQ | Unpack for Mask Registers | AVX512BW, AVX512F |
| KUNPCKWD | Unpack for Mask Registers | AVX512BW, AVX512F |
| KXNORB | Bitwise Logical XNOR Masks | AVX512BW, AVX512DQ, AVX512F |
| KXNORD | Bitwise Logical XNOR Masks | AVX512BW, AVX512DQ, AVX512F |
| KXNORQ | Bitwise Logical XNOR Masks | AVX512BW, AVX512DQ, AVX512F |
| KXNORW | Bitwise Logical XNOR Masks | AVX512BW, AVX512DQ, AVX512F |
| KXORB | Bitwise Logical XOR Masks | AVX512BW, AVX512DQ, AVX512F |
| KXORD | Bitwise Logical XOR Masks | AVX512BW, AVX512DQ, AVX512F |
| KXORQ | Bitwise Logical XOR Masks | AVX512BW, AVX512DQ, AVX512F |
| KXORW | Bitwise Logical XOR Masks | AVX512BW, AVX512DQ, AVX512F |
| LAHF | Load Status Flags into AH Register | |
| LAR | Load Access Rights Byte | |
| LDDQU | Load Unaligned Integer 128 Bits | AVX, SSE3 |
| LDMXCSR | Load MXCSR Register | AVX, SSE |
| LDS | Load Far Pointer | |
| LEA | Load Effective Address | |
| LEAVE | High Level Procedure Exit | |
| LES | Load Far Pointer | |
| LFENCE | Load Fence | |
| LFS | Load Far Pointer | |
| LGDT | Load Global/Interrupt Descriptor Table Register | |
| LGS | Load Far Pointer | |
| LIDT | Load Global/Interrupt Descriptor Table Register | |
| LLDT | Load Local Descriptor Table Register | |
| LMSW | Load Machine Status Word | |
| LOCK | Assert LOCK# Signal Prefix | |
| LODS | Load String | |
| LODSB | Load String | |
| LODSD | Load String | |
| LODSQ | Load String | |
| LODSW | Load String | |
| LOOP | Loop According to ECX Counter | |
| LOOPE | Loop According to ECX Counter | |
| LOOPNE | Loop According to ECX Counter | |
| LOOPNZ | Loop According to ECX Counter | |
| LOOPZ | Loop According to ECX Counter | |
| LSL | Load Segment Limit | |
| LSS | Load Far Pointer | |
| LTR | Load Task Register | |
| LZCNT | Count the Number of Leading Zero Bits | LZCNT |
| MASKMOVDQU | Store Selected Bytes of Double Quadword | AVX, SSE2 |
| MASKMOVQ | Store Selected Bytes of Quadword | |
| MAXPD | Maximum of Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| MAXPS | Maximum of Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| MAXSD | Return Maximum Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| MAXSS | Return Maximum Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| MFENCE | Memory Fence | |
| MINPD | Minimum of Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| MINPS | Minimum of Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| MINSD | Return Minimum Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| MINSS | Return Minimum Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| MONITOR | Set Up Monitor Address | |
| MOV | Move | |
| MOVAPD | Move Aligned Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| MOVAPS | Move Aligned Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| MOVBE | Move Data After Swapping Bytes | |
| MOVD | Move Doubleword/Move Quadword | AVX, AVX512F, MMX, SSE2 |
| MOVDDUP | Replicate Double FP Values | AVX, AVX512F, AVX512VL, SSE3 |
| MOVDQ2Q | Move Quadword from XMM to MMX Technology Register | |
| MOVDQA | Move Aligned Packed Integer Values | AVX, AVX512F, AVX512VL, SSE2 |
| MOVDQU | Move Unaligned Packed Integer Values | AVX, AVX512BW, AVX512F, AVX512VL, SSE2 |
| MOVHLPS | Move Packed Single-Precision Floating-Point Values High to Low | AVX, AVX512F, SSE |
| MOVHPD | Move High Packed Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| MOVHPS | Move High Packed Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| MOVLHPS | Move Packed Single-Precision Floating-Point Values Low to High | AVX, AVX512F, SSE |
| MOVLPD | Move Low Packed Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| MOVLPS | Move Low Packed Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| MOVMSKPD | Extract Packed Double-Precision Floating-Point Sign Mask | AVX, SSE2 |
| MOVMSKPS | Extract Packed Single-Precision Floating-Point Sign Mask | AVX, SSE |
| MOVNTDQ | Store Packed Integers Using Non-Temporal Hint | AVX, AVX512F, AVX512VL, SSE2 |
| MOVNTDQA | Load Double Quadword Non-Temporal Aligned Hint | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| MOVNTI | Store Doubleword Using Non-Temporal Hint | |
| MOVNTPD | Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint | AVX, AVX512F, AVX512VL, SSE2 |
| MOVNTPS | Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint | AVX, AVX512F, AVX512VL, SSE |
| MOVNTQ | Store of Quadword Using Non-Temporal Hint | |
| MOVQ | Move Quadword | AVX, AVX512F, MMX, SSE2 |
| MOVQ2DQ | Move Quadword from MMX Technology to XMM Register | |
| MOVS | Move Data from String to String | |
| MOVSB | Move Data from String to String | |
| MOVSD | Move Data from String to String | |
| MOVSHDUP | Replicate Single FP Values | AVX, AVX512F, AVX512VL, SSE3 |
| MOVSLDUP | Replicate Single FP Values | AVX, AVX512F, AVX512VL, SSE3 |
| MOVSQ | Move Data from String to String | |
| MOVSS | Move or Merge Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| MOVSW | Move Data from String to String | |
| MOVSX | Move with Sign-Extension | |
| MOVSXD | Move with Sign-Extension | |
| MOVUPD | Move Unaligned Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| MOVUPS | Move Unaligned Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| MOVZX | Move with Zero-Extend | |
| MPSADBW | Compute Multiple Packed Sums of Absolute Difference | AVX, AVX2, SSE4_1 |
| MUL | Unsigned Multiply | |
| MULPD | Multiply Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| MULPS | Multiply Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| MULSD | Multiply Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| MULSS | Multiply Scalar Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| MULX | Unsigned Multiply Without Affecting Flags | BMI2 |
| MWAIT | Monitor Wait | |
| NEG | Two's Complement Negation | |
| NOP | No Operation | |
| NOT | One's Complement Negation | |
| OR | Logical Inclusive OR | |
| ORPD | Bitwise Logical OR of Packed Double Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE2 |
| ORPS | Bitwise Logical OR of Packed Single Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE |
| OUT | Output to Port | |
| OUTS | Output String to Port | |
| OUTSB | Output String to Port | |
| OUTSD | Output String to Port | |
| OUTSW | Output String to Port | |
| PABSB | Packed Absolute Value | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| PABSD | Packed Absolute Value | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| PABSQ | Packed Absolute Value | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| PABSW | Packed Absolute Value | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| PACKSSDW | Pack with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PACKSSWB | Pack with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PACKUSDW | Pack with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, SSE4_1 |
| PACKUSWB | Pack with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PADDB | Add Packed Integers | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PADDD | Add Packed Integers | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PADDQ | Add Packed Integers | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PADDSB | Add Packed Signed Integers with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PADDSW | Add Packed Signed Integers with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PADDUSB | Add Packed Unsigned Integers with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PADDUSW | Add Packed Unsigned Integers with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PADDW | Add Packed Integers | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PALIGNR | Packed Align Right | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| PAND | Logical AND | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| PANDN | Logical AND NOT | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| PAUSE | Spin Loop Hint | |
| PAVGB | Average Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2 |
| PAVGW | Average Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2 |
| PBLENDVB | Variable Blend Packed Bytes | AVX, AVX2, SSE4_1 |
| PBLENDW | Blend Packed Words | AVX, AVX2, SSE4_1 |
| PCLMULQDQ | PCLMULQDQ - Carry-Less Multiplication Quadword | AVX, PCLMULQDQ |
| PCMPEQB | Compare Packed Data for Equal | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PCMPEQD | Compare Packed Data for Equal | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PCMPEQQ | Compare Packed Qword Data for Equal | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| PCMPEQW | Compare Packed Data for Equal | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PCMPESTRI | Packed Compare Explicit Length Strings, Return Index | AVX, SSE4_2 |
| PCMPESTRM | Packed Compare Explicit Length Strings, Return Mask | AVX, SSE4_2 |
| PCMPGTB | Compare Packed Signed Integers for Greater Than | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PCMPGTD | Compare Packed Signed Integers for Greater Than | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PCMPGTQ | Compare Packed Data for Greater Than | AVX, AVX2, AVX512F, AVX512VL, SSE4_2 |
| PCMPGTW | Compare Packed Signed Integers for Greater Than | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PCMPISTRI | Packed Compare Implicit Length Strings, Return Index | AVX, SSE4_2 |
| PCMPISTRM | Packed Compare Implicit Length Strings, Return Mask | AVX, SSE4_2 |
| PDEP | Parallel Bits Deposit | BMI2 |
| PEXT | Parallel Bits Extract | BMI2 |
| PEXTRB | Extract Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| PEXTRD | Extract Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| PEXTRQ | Extract Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| PEXTRW | Extract Word | AVX, AVX512BW, SSE, SSE2, SSE4_1 |
| PHADDD | Packed Horizontal Add | AVX, AVX2, SSSE3 |
| PHADDSW | Packed Horizontal Add and Saturate | AVX, AVX2, SSSE3 |
| PHADDW | Packed Horizontal Add | AVX, AVX2, SSSE3 |
| PHMINPOSUW | Packed Horizontal Word Minimum | AVX, SSE4_1 |
| PHSUBD | Packed Horizontal Subtract | AVX, AVX2, SSSE3 |
| PHSUBSW | Packed Horizontal Subtract and Saturate | AVX, AVX2, SSSE3 |
| PHSUBW | Packed Horizontal Subtract | AVX, AVX2, SSSE3 |
| PINSRB | Insert Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| PINSRD | Insert Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| PINSRQ | Insert Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| PINSRW | Insert Word | AVX, AVX512BW, SSE, SSE2 |
| PMADDUBSW | Multiply and Add Packed Signed and Unsigned Bytes | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| PMADDWD | Multiply and Add Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PMAXSB | Maximum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMAXSD | Maximum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMAXSQ | Maximum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMAXSW | Maximum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMAXUB | Maximum of Packed Unsigned Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMAXUD | Maximum of Packed Unsigned Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| PMAXUQ | Maximum of Packed Unsigned Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| PMAXUW | Maximum of Packed Unsigned Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMINSB | Minimum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMINSD | Minimum of Packed Signed Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| PMINSQ | Minimum of Packed Signed Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| PMINSW | Minimum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMINUB | Minimum of Packed Unsigned Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMINUD | Minimum of Packed Unsigned Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| PMINUQ | Minimum of Packed Unsigned Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| PMINUW | Minimum of Packed Unsigned Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| PMOVMSKB | Move Byte Mask | AVX, AVX2, SSE, SSE2 |
| PMOVSXBD | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| PMOVSXBQ | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| PMOVSXBW | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| PMOVSXDQ | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| PMOVSXWD | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| PMOVSXWQ | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| PMOVZXBD | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| PMOVZXBQ | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| PMOVZXBW | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| PMOVZXDQ | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| PMOVZXWD | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| PMOVZXWQ | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| PMULDQ | Multiply Packed Doubleword Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| PMULHRSW | Packed Multiply High with Round and Scale | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| PMULHUW | Multiply Packed Unsigned Integers and Store High Result | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2 |
| PMULHW | Multiply Packed Signed Integers and Store High Result | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PMULLD | Multiply Packed Integers and Store Low Result | AVX, AVX2, AVX512DQ, AVX512F, AVX512VL, SSE4_1 |
| PMULLQ | Multiply Packed Integers and Store Low Result | AVX, AVX2, AVX512DQ, AVX512F, AVX512VL, SSE4_1 |
| PMULLW | Multiply Packed Signed Integers and Store Low Result | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PMULUDQ | Multiply Packed Unsigned Doubleword Integers | AVX, AVX2, AVX512F, AVX512VL, SSE2 |
| POP | Pop a Value from the Stack | |
| POPA | Pop All General-Purpose Registers | |
| POPAD | Pop All General-Purpose Registers | |
| POPCNT | Return the Count of Number of Bits Set to 1 | |
| POPF | Pop Stack into EFLAGS Register | |
| POPFD | Pop Stack into EFLAGS Register | |
| POPFQ | Pop Stack into EFLAGS Register | |
| POR | Bitwise Logical OR | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| PREFETCHNTA | Prefetch Data Into Caches | |
| PREFETCHT0 | Prefetch Data Into Caches | |
| PREFETCHT1 | Prefetch Data Into Caches | |
| PREFETCHT2 | Prefetch Data Into Caches | |
| PREFETCHW | Prefetch Data into Caches in Anticipation of a Write | PRFCHW |
| PREFETCHWT1 | Prefetch Vector Data Into Caches with Intent to Write and T1 Hint | PREFETCHWT1 |
| PROLD | Bit Rotate Left | AVX512F, AVX512VL |
| PROLQ | Bit Rotate Left | AVX512F, AVX512VL |
| PROLVD | Bit Rotate Left | AVX512F, AVX512VL |
| PROLVQ | Bit Rotate Left | AVX512F, AVX512VL |
| PRORD | Bit Rotate Right | AVX512F, AVX512VL |
| PRORQ | Bit Rotate Right | AVX512F, AVX512VL |
| PRORVD | Bit Rotate Right | AVX512F, AVX512VL |
| PRORVQ | Bit Rotate Right | AVX512F, AVX512VL |
| PSADBW | Compute Sum of Absolute Differences | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2 |
| PSHUFB | Packed Shuffle Bytes | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| PSHUFD | Shuffle Packed Doublewords | AVX, AVX2, AVX512F, AVX512VL, SSE2 |
| PSHUFHW | Shuffle Packed High Words | AVX, AVX2, AVX512BW, AVX512VL, SSE2 |
| PSHUFLW | Shuffle Packed Low Words | AVX, AVX2, AVX512BW, AVX512VL, SSE2 |
| PSHUFW | Shuffle Packed Words | |
| PSIGNB | Packed SIGN | AVX, AVX2, SSSE3 |
| PSIGND | Packed SIGN | AVX, AVX2, SSSE3 |
| PSIGNW | Packed SIGN | AVX, AVX2, SSSE3 |
| PSLLD | Shift Packed Data Left Logical | AVX, AVX2, MMX, SSE2 |
| PSLLDQ | Shift Double Quadword Left Logical | AVX, AVX2, AVX512BW, AVX512VL, SSE2 |
| PSLLQ | Shift Packed Data Left Logical | AVX, AVX2, MMX, SSE2 |
| PSLLW | Shift Packed Data Left Logical | AVX, AVX2, MMX, SSE2 |
| PSRAD | Shift Packed Data Right Arithmetic | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSRAQ | Shift Packed Data Right Arithmetic | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSRAW | Shift Packed Data Right Arithmetic | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSRLD | Shift Packed Data Right Logical | AVX, AVX2, MMX, SSE2 |
| PSRLDQ | Shift Double Quadword Right Logical | AVX, AVX2, AVX512BW, AVX512VL, SSE2 |
| PSRLQ | Shift Packed Data Right Logical | AVX, AVX2, MMX, SSE2 |
| PSRLW | Shift Packed Data Right Logical | AVX, AVX2, MMX, SSE2 |
| PSUBB | Subtract Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSUBD | Subtract Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSUBQ | Subtract Packed Quadword Integers | AVX, AVX2, AVX512F, AVX512VL, SSE2 |
| PSUBSB | Subtract Packed Signed Integers with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSUBSW | Subtract Packed Signed Integers with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSUBUSB | Subtract Packed Unsigned Integers with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSUBUSW | Subtract Packed Unsigned Integers with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PSUBW | Subtract Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| PTEST | PTEST- Logical Compare | AVX, SSE4_1 |
| PTWRITE | PTWRITE - Write Data to a Processor Trace Packet | |
| PUNPCKHBW | Unpack High Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PUNPCKHDQ | Unpack High Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PUNPCKHQDQ | Unpack High Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PUNPCKHWD | Unpack High Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PUNPCKLBW | Unpack Low Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PUNPCKLDQ | Unpack Low Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PUNPCKLQDQ | Unpack Low Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PUNPCKLWD | Unpack Low Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| PUSH | Push Word, Doubleword or Quadword Onto the Stack | |
| PUSHA | Push All General-Purpose Registers | |
| PUSHAD | Push All General-Purpose Registers | |
| PUSHF | Push EFLAGS Register onto the Stack | |
| PUSHFD | Push EFLAGS Register onto the Stack | |
| PXOR | Logical Exclusive OR | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| RCL | Rotate | |
| RCPPS | Compute Reciprocals of Packed Single-Precision Floating-Point Values | AVX, SSE |
| RCPSS | Compute Reciprocal of Scalar Single-Precision Floating-Point Values | AVX, SSE |
| RCR | Rotate | |
| RDFSBASE | Read FS/GS Segment Base | FSGSBASE |
| RDGSBASE | Read FS/GS Segment Base | FSGSBASE |
| RDMSR | Read from Model Specific Register | |
| RDPID | Read Processor ID | RDPID |
| RDPKRU | Read Protection Key Rights for User Pages | |
| RDPMC | Read Performance-Monitoring Counters | |
| RDRAND | Read Random Number | RDRAND |
| RDSEED | Read Random SEED | RDSEED |
| RDTSC | Read Time-Stamp Counter | |
| RDTSCP | Read Time-Stamp Counter and Processor ID | |
| REP INS | Repeat String Operation Prefix | |
| REP LODS | Repeat String Operation Prefix | |
| REP MOVS | Repeat String Operation Prefix | |
| REP OUTS | Repeat String Operation Prefix | |
| REP STOS | Repeat String Operation Prefix | |
| REPE CMPS | Repeat String Operation Prefix | |
| REPE SCAS | Repeat String Operation Prefix | |
| REPNE CMPS | Repeat String Operation Prefix | |
| REPNE SCAS | Repeat String Operation Prefix | |
| RET | Return from Procedure | |
| ROL | Rotate | |
| ROR | Rotate | |
| RORX | Rotate Right Logical Without Affecting Flags | BMI2 |
| ROUNDPD | Round Packed Double Precision Floating-Point Values | AVX, SSE4_1 |
| ROUNDPS | Round Packed Single Precision Floating-Point Values | AVX, SSE4_1 |
| ROUNDSD | Round Scalar Double Precision Floating-Point Values | AVX, SSE4_1 |
| ROUNDSS | Round Scalar Single Precision Floating-Point Values | AVX, SSE4_1 |
| RSM | Resume from System Management Mode | |
| RSQRTPS | Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values | AVX, SSE |
| RSQRTSS | Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value | AVX, SSE |
| SAHF | Store AH into Flags | |
| SAL | Shift | |
| SAR | Shift | |
| SARX | Shift Without Affecting Flags | |
| SBB | Integer Subtraction with Borrow | |
| SCAS | Scan String | |
| SCASB | Scan String | |
| SCASD | Scan String | |
| SCASW | Scan String | |
| SETA | Set Byte on Condition | |
| SETAE | Set Byte on Condition | |
| SETB | Set Byte on Condition | |
| SETBE | Set Byte on Condition | |
| SETC | Set Byte on Condition | |
| SETE | Set Byte on Condition | |
| SETG | Set Byte on Condition | |
| SETGE | Set Byte on Condition | |
| SETL | Set Byte on Condition | |
| SETLE | Set Byte on Condition | |
| SETNA | Set Byte on Condition | |
| SETNAE | Set Byte on Condition | |
| SETNB | Set Byte on Condition | |
| SETNBE | Set Byte on Condition | |
| SETNC | Set Byte on Condition | |
| SETNE | Set Byte on Condition | |
| SETNG | Set Byte on Condition | |
| SETNGE | Set Byte on Condition | |
| SETNL | Set Byte on Condition | |
| SETNO | Set Byte on Condition | |
| SETNP | Set Byte on Condition | |
| SETNS | Set Byte on Condition | |
| SETNZ | Set Byte on Condition | |
| SETO | Set Byte on Condition | |
| SETP | Set Byte on Condition | |
| SETPE | Set Byte on Condition | |
| SETPO | Set Byte on Condition | |
| SETS | Set Byte on Condition | |
| SETZ | Set Byte on Condition | |
| SFENCE | Store Fence | |
| SGDT | Store Global Descriptor Table Register | |
| SHA1MSG1 | Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords | SHA |
| SHA1MSG2 | Perform a Final Calculation for the Next Four SHA1 Message Dwords | SHA |
| SHA1NEXTE | Calculate SHA1 State Variable E after Four Rounds | SHA |
| SHA1RNDS4 | Perform Four Rounds of SHA1 Operation | SHA |
| SHA256MSG1 | Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords | SHA |
| SHA256MSG2 | Perform a Final Calculation for the Next Four SHA256 Message Dwords | SHA |
| SHA256RNDS2 | Perform Two Rounds of SHA256 Operation | SHA |
| SHL | Shift | |
| SHLD | Double Precision Shift Left | |
| SHLX | Shift Without Affecting Flags | |
| SHR | Shift | |
| SHRD | Double Precision Shift Right | |
| SHRX | Shift Without Affecting Flags | |
| SHUFPD | Packed Interleave Shuffle of Pairs of Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| SHUFPS | Packed Interleave Shuffle of Quadruplets of Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| SIDT | Store Interrupt Descriptor Table Register | |
| SLDT | Store Local Descriptor Table Register | |
| SMSW | Store Machine Status Word | |
| SQRTPD | Square Root of Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| SQRTPS | Square Root of Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| SQRTSD | Compute Square Root of Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| SQRTSS | Compute Square Root of Scalar Single-Precision Value | AVX, AVX512F, SSE |
| STAC | Set AC Flag in EFLAGS Register | |
| STC | Set Carry Flag | |
| STD | Set Direction Flag | |
| STI | Set Interrupt Flag | |
| STMXCSR | Store MXCSR Register State | AVX, SSE |
| STOS | Store String | |
| STOSB | Store String | |
| STOSD | Store String | |
| STOSQ | Store String | |
| STOSW | Store String | |
| STR | Store Task Register | |
| SUB | Subtract | |
| SUBPD | Subtract Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| SUBPS | Subtract Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| SUBSD | Subtract Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| SUBSS | Subtract Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| SWAPGS | Swap GS Base Register | |
| SYSCALL | Fast System Call | |
| SYSENTER | Fast System Call | |
| SYSEXIT | Fast Return from Fast System Call | |
| SYSRET | Return From Fast System Call | |
| TEST | Logical Compare | |
| TZCNT | Count the Number of Trailing Zero Bits | BMI1 |
| UCOMISD | Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS | AVX, AVX512F, SSE2 |
| UCOMISS | Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS | AVX, AVX512F, SSE |
| UD2 | Undefined Instruction | |
| UNPCKHPD | Unpack and Interleave High Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| UNPCKHPS | Unpack and Interleave High Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| UNPCKLPD | Unpack and Interleave Low Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| UNPCKLPS | Unpack and Interleave Low Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| VADDPD | Add Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VADDPS | Add Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VADDSD | Add Scalar Double-Precision Floating-Point Values | AVX, AVX512F, SSE2 |
| VADDSS | Add Scalar Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| VADDSUBPD | Packed Double-FP Add/Subtract | AVX, SSE3 |
| VADDSUBPS | Packed Single-FP Add/Subtract | AVX, SSE3 |
| VAESDEC | Perform One Round of an AES Decryption Flow | AES, AVX |
| VAESDECLAST | Perform Last Round of an AES Decryption Flow | AES, AVX |
| VAESENC | Perform One Round of an AES Encryption Flow | AES, AVX |
| VAESENCLAST | Perform Last Round of an AES Encryption Flow | AES, AVX |
| VAESIMC | Perform the AES InvMixColumn Transformation | AES, AVX |
| VAESKEYGENASSIST | AES Round Key Generation Assist | AES, AVX |
| VALIGND | Align Doubleword/Quadword Vectors | AVX512F, AVX512VL |
| VALIGNQ | Align Doubleword/Quadword Vectors | AVX512F, AVX512VL |
| VANDNPD | Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE2 |
| VANDNPS | Bitwise Logical AND NOT of Packed Single Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE |
| VANDPD | Bitwise Logical AND of Packed Double Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE2 |
| VANDPS | Bitwise Logical AND of Packed Single Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE |
| VBLENDMPD | Blend Float64/Float32 Vectors Using an OpMask Control | AVX512F, AVX512VL |
| VBLENDMPS | Blend Float64/Float32 Vectors Using an OpMask Control | AVX512F, AVX512VL |
| VBLENDPD | Blend Packed Double Precision Floating-Point Values | AVX, SSE4_1 |
| VBLENDPS | Blend Packed Single Precision Floating-Point Values | AVX, SSE4_1 |
| VBLENDVPD | Variable Blend Packed Double Precision Floating-Point Values | AVX, SSE4_1 |
| VBLENDVPS | Variable Blend Packed Single Precision Floating-Point Values | AVX, SSE4_1 |
| VBROADCASTF128 | Load with Broadcast Floating-Point Data | AVX, AVX512DQ, AVX512F, AVX512VL |
| VBROADCASTF32X2 | Load with Broadcast Floating-Point Data | AVX, AVX512DQ, AVX512F, AVX512VL |
| VBROADCASTF32X4 | Load with Broadcast Floating-Point Data | AVX, AVX512DQ, AVX512F, AVX512VL |
| VBROADCASTF32X8 | Load with Broadcast Floating-Point Data | AVX, AVX512DQ, AVX512F, AVX512VL |
| VBROADCASTF64X2 | Load with Broadcast Floating-Point Data | AVX, AVX512DQ, AVX512F, AVX512VL |
| VBROADCASTF64X4 | Load with Broadcast Floating-Point Data | AVX, AVX512DQ, AVX512F, AVX512VL |
| VBROADCASTI32X8 | Load Integer and Broadcast | AVX2, AVX512BW, AVX512F, AVX512VL |
| VBROADCASTI32x2 | Load Integer and Broadcast | AVX2, AVX512BW, AVX512F, AVX512VL |
| VBROADCASTI64X4 | Load Integer and Broadcast | AVX2, AVX512BW, AVX512F, AVX512VL |
| VBROADCASTSD | Load with Broadcast Floating-Point Data | AVX, AVX512DQ, AVX512F, AVX512VL |
| VBROADCASTSS | Load with Broadcast Floating-Point Data | AVX, AVX512DQ, AVX512F, AVX512VL |
| VCMPPD | Compare Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VCMPPS | Compare Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VCMPSD | Compare Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VCMPSS | Compare Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| VCOMISD | Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS | AVX, AVX512F, SSE2 |
| VCOMISS | Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS | AVX, AVX512F, SSE |
| VCOMPRESSPD | Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory | AVX512F, AVX512VL |
| VCOMPRESSPS | Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory | AVX512F, AVX512VL |
| VCVTDQ2PD | Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VCVTDQ2PS | Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VCVTPD2DQ | Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers | AVX, AVX512F, AVX512VL, SSE2 |
| VCVTPD2PS | Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VCVTPD2QQ | Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers | AVX512DQ, AVX512VL |
| VCVTPD2UDQ | Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers | AVX512F, AVX512VL |
| VCVTPD2UQQ | Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers | AVX512DQ, AVX512VL |
| VCVTPH2PS | Convert 16-bit FP values to Single-Precision FP values | AVX512F, AVX512VL, F16C |
| VCVTPS2DQ | Convert Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values | AVX, AVX512F, AVX512VL, SSE2 |
| VCVTPS2PD | Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VCVTPS2PH | Convert Single-Precision FP value to 16-bit FP value | AVX512F, AVX512VL, F16C |
| VCVTPS2QQ | Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values | AVX512DQ, AVX512VL |
| VCVTPS2UDQ | Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values | AVX512F, AVX512VL |
| VCVTPS2UQQ | Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values | AVX512DQ, AVX512VL |
| VCVTQQ2PD | Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values | AVX512DQ, AVX512VL |
| VCVTQQ2PS | Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values | AVX512DQ, AVX512VL |
| VCVTSD2SI | Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer | AVX, AVX512F, SSE2 |
| VCVTSD2SS | Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VCVTSD2USI | Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer | AVX512F |
| VCVTSI2SD | Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VCVTSI2SS | Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| VCVTSS2SD | Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VCVTSS2SI | Convert Scalar Single-Precision Floating-Point Value to Doubleword Integer | AVX, AVX512F, SSE |
| VCVTSS2USI | Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer | AVX512F |
| VCVTTPD2DQ | Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers | AVX, AVX512F, AVX512VL, SSE2 |
| VCVTTPD2QQ | Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers | AVX512DQ, AVX512VL |
| VCVTTPD2UDQ | Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers | AVX512F, AVX512VL |
| VCVTTPD2UQQ | Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers | AVX512DQ, AVX512VL |
| VCVTTPS2DQ | Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values | AVX, AVX512F, AVX512VL, SSE2 |
| VCVTTPS2QQ | Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values | AVX512DQ, AVX512VL |
| VCVTTPS2UDQ | Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values | AVX512F, AVX512VL |
| VCVTTPS2UQQ | Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values | AVX512DQ, AVX512VL |
| VCVTTSD2SI | Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Integer | AVX, AVX512F, SSE2 |
| VCVTTSD2USI | Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer | AVX512F |
| VCVTTSS2SI | Convert with Truncation Scalar Single-Precision Floating-Point Value to Integer | AVX, AVX512F, SSE |
| VCVTTSS2USI | Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer | AVX512F |
| VCVTUDQ2PD | Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL |
| VCVTUDQ2PS | Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL |
| VCVTUQQ2PD | Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values | AVX512DQ, AVX512VL |
| VCVTUQQ2PS | Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values | AVX512DQ, AVX512VL |
| VCVTUSI2SD | Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value | AVX512F |
| VCVTUSI2SS | Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value | AVX512F |
| VDBPSADBW | Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes | AVX512BW, AVX512VL |
| VDIVPD | Divide Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VDIVPS | Divide Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VDIVSD | Divide Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VDIVSS | Divide Scalar Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| VDPPD | Dot Product of Packed Double Precision Floating-Point Values | AVX, SSE4_1 |
| VDPPS | Dot Product of Packed Single Precision Floating-Point Values | AVX, SSE4_1 |
| VERR | Verify a Segment for Reading or Writing | |
| VERW | Verify a Segment for Reading or Writing | |
| VEXP2PD | Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error | AVX512ER |
| VEXP2PS | Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error | AVX512ER |
| VEXPANDPD | Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory | AVX512F, AVX512VL |
| VEXPANDPS | Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory | AVX512F, AVX512VL |
| VEXTRACTF128 | Extra ct Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTF32x4 | Extra ct Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTF32x8 | Extra ct Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTF64x2 | Extra ct Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTF64x4 | Extra ct Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTI128 | Extract packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTI32x4 | Extract packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTI32x8 | Extract packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTI64x2 | Extract packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTI64x4 | Extract packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VEXTRACTPS | Extract Packed Floating-Point Values | AVX, AVX512F, SSE4_1 |
| VFIXUPIMMPD | Fix Up Special Packed Float64 Values | AVX512F, AVX512VL |
| VFIXUPIMMPS | Fix Up Special Packed Float32 Values | AVX512F, AVX512VL |
| VFIXUPIMMSD | Fix Up Special Scalar Float64 Value | AVX512F |
| VFIXUPIMMSS | Fix Up Special Scalar Float32 Value | AVX512F |
| VFMADD132PD | Fused Multiply-Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADD132PS | Fused Multiply-Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADD132SD | Fused Multiply-Add of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFMADD132SS | Fused Multiply-Add of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFMADD213PD | Fused Multiply-Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADD213PS | Fused Multiply-Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADD213SD | Fused Multiply-Add of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFMADD213SS | Fused Multiply-Add of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFMADD231PD | Fused Multiply-Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADD231PS | Fused Multiply-Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADD231SD | Fused Multiply-Add of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFMADD231SS | Fused Multiply-Add of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFMADDSUB132PD | Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADDSUB132PS | Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADDSUB213PD | Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADDSUB213PS | Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADDSUB231PD | Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMADDSUB231PS | Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUB132PD | Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUB132PS | Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUB132SD | Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFMSUB132SS | Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFMSUB213PD | Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUB213PS | Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUB213SD | Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFMSUB213SS | Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFMSUB231PD | Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUB231PS | Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUB231SD | Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFMSUB231SS | Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFMSUBADD132PD | Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUBADD132PS | Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUBADD213PD | Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUBADD213PS | Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUBADD231PD | Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFMSUBADD231PS | Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMADD132PD | Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMADD132PS | Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMADD132SD | Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFNMADD132SS | Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFNMADD213PD | Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMADD213PS | Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMADD213SD | Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFNMADD213SS | Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFNMADD231PD | Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMADD231PS | Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMADD231SD | Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFNMADD231SS | Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFNMSUB132PD | Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMSUB132PS | Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMSUB132SD | Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFNMSUB132SS | Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFNMSUB213PD | Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMSUB213PS | Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMSUB213SD | Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFNMSUB213SS | Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFNMSUB231PD | Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMSUB231PS | Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values | AVX512F, AVX512VL, FMA |
| VFNMSUB231SD | Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values | AVX512F, FMA |
| VFNMSUB231SS | Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values | AVX512F, FMA |
| VFPCLASSPD | Tests Types Of a Packed Float64 Values | AVX512DQ, AVX512VL |
| VFPCLASSPS | Tests Types Of a Packed Float32 Values | AVX512DQ, AVX512VL |
| VFPCLASSSD | Tests Types Of a Scalar Float64 Values | AVX512DQ |
| VFPCLASSSS | Tests Types Of a Scalar Float32 Values | AVX512DQ |
| VGATHERDPD | Gather Packed Single, Packed Double with Signed Dword | AVX512F, AVX512VL |
| VGATHERDPS | Gather Packed SP FP values Using Signed Dword/Qword Indices | AVX2 |
| VGATHERPF0DPD | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint | AVX512PF |
| VGATHERPF0DPS | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint | AVX512PF |
| VGATHERPF0QPD | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint | AVX512PF |
| VGATHERPF0QPS | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint | AVX512PF |
| VGATHERPF1DPD | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint | AVX512PF |
| VGATHERPF1DPS | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint | AVX512PF |
| VGATHERPF1QPD | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint | AVX512PF |
| VGATHERPF1QPS | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint | AVX512PF |
| VGATHERQPD | Gather Packed Single, Packed Double with Signed Qword Indices | AVX512F, AVX512VL |
| VGATHERQPS | Gather Packed Single, Packed Double with Signed Qword Indices | AVX512F, AVX512VL |
| VGETEXPPD | Convert Exponents of Packed DP FP Values to DP FP Values | AVX512F, AVX512VL |
| VGETEXPPS | Convert Exponents of Packed SP FP Values to SP FP Values | AVX512F, AVX512VL |
| VGETEXPSD | Convert Exponents of Scalar DP FP Values to DP FP Value | AVX512F |
| VGETEXPSS | Convert Exponents of Scalar SP FP Values to SP FP Value | AVX512F |
| VGETMANTPD | Extract Float64 Vector of Normalized Mantissas from Float64 Vector | AVX512F, AVX512VL |
| VGETMANTPS | Extract Float32 Vector of Normalized Mantissas from Float32 Vector | AVX512F, AVX512VL |
| VGETMANTSD | Extract Float64 of Normalized Mantissas from Float64 Scalar | AVX512F |
| VGETMANTSS | Extract Float32 Vector of Normalized Mantissa from Float32 Vector | AVX512F |
| VHADDPD | Packed Double-FP Horizontal Add | AVX, SSE3 |
| VHADDPS | Packed Single-FP Horizontal Add | AVX, SSE3 |
| VHSUBPD | Packed Double-FP Horizontal Subtract | AVX, SSE3 |
| VHSUBPS | Packed Single-FP Horizontal Subtract | AVX, SSE3 |
| VINSERTF128 | Insert Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VINSERTF32x4 | Insert Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VINSERTF32x8 | Insert Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VINSERTF64x2 | Insert Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VINSERTF64x4 | Insert Packed Floating-Point Values | AVX, AVX512DQ, AVX512F, AVX512VL |
| VINSERTI128 | Insert Packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VINSERTI32x4 | Insert Packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VINSERTI32x8 | Insert Packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VINSERTI64x2 | Insert Packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VINSERTI64x4 | Insert Packed Integer Values | AVX2, AVX512DQ, AVX512F, AVX512VL |
| VINSERTPS | Insert Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE4_1 |
| VLDDQU | Load Unaligned Integer 128 Bits | AVX, SSE3 |
| VLDMXCSR | Load MXCSR Register | AVX, SSE |
| VMASKMOVDQU | Store Selected Bytes of Double Quadword | AVX, SSE2 |
| VMASKMOVPD | Conditional SIMD Packed Loads and Stores | AVX |
| VMASKMOVPS | Conditional SIMD Packed Loads and Stores | AVX |
| VMAXPD | Maximum of Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VMAXPS | Maximum of Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VMAXSD | Return Maximum Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VMAXSS | Return Maximum Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| VMINPD | Minimum of Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VMINPS | Minimum of Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VMINSD | Return Minimum Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VMINSS | Return Minimum Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| VMOVAPD | Move Aligned Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VMOVAPS | Move Aligned Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VMOVD | Move Doubleword/Move Quadword | AVX, AVX512F, MMX, SSE2 |
| VMOVDDUP | Replicate Double FP Values | AVX, AVX512F, AVX512VL, SSE3 |
| VMOVDQA | Move Aligned Packed Integer Values | AVX, AVX512F, AVX512VL, SSE2 |
| VMOVDQA32 | Move Aligned Packed Integer Values | AVX, AVX512F, AVX512VL, SSE2 |
| VMOVDQA64 | Move Aligned Packed Integer Values | AVX, AVX512F, AVX512VL, SSE2 |
| VMOVDQU | Move Unaligned Packed Integer Values | AVX, AVX512BW, AVX512F, AVX512VL, SSE2 |
| VMOVDQU16 | Move Unaligned Packed Integer Values | AVX, AVX512BW, AVX512F, AVX512VL, SSE2 |
| VMOVDQU32 | Move Unaligned Packed Integer Values | AVX, AVX512BW, AVX512F, AVX512VL, SSE2 |
| VMOVDQU64 | Move Unaligned Packed Integer Values | AVX, AVX512BW, AVX512F, AVX512VL, SSE2 |
| VMOVDQU8 | Move Unaligned Packed Integer Values | AVX, AVX512BW, AVX512F, AVX512VL, SSE2 |
| VMOVHLPS | Move Packed Single-Precision Floating-Point Values High to Low | AVX, AVX512F, SSE |
| VMOVHPD | Move High Packed Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VMOVHPS | Move High Packed Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| VMOVLHPS | Move Packed Single-Precision Floating-Point Values Low to High | AVX, AVX512F, SSE |
| VMOVLPD | Move Low Packed Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VMOVLPS | Move Low Packed Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| VMOVMSKPD | Extract Packed Double-Precision Floating-Point Sign Mask | AVX, SSE2 |
| VMOVMSKPS | Extract Packed Single-Precision Floating-Point Sign Mask | AVX, SSE |
| VMOVNTDQ | Store Packed Integers Using Non-Temporal Hint | AVX, AVX512F, AVX512VL, SSE2 |
| VMOVNTDQA | Load Double Quadword Non-Temporal Aligned Hint | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VMOVNTPD | Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint | AVX, AVX512F, AVX512VL, SSE2 |
| VMOVNTPS | Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint | AVX, AVX512F, AVX512VL, SSE |
| VMOVQ | Move Quadword | AVX, AVX512F, MMX, SSE2 |
| VMOVSD | Move or Merge Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VMOVSHDUP | Replicate Single FP Values | AVX, AVX512F, AVX512VL, SSE3 |
| VMOVSLDUP | Replicate Single FP Values | AVX, AVX512F, AVX512VL, SSE3 |
| VMOVSS | Move or Merge Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| VMOVUPD | Move Unaligned Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VMOVUPS | Move Unaligned Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VMPSADBW | Compute Multiple Packed Sums of Absolute Difference | AVX, AVX2, SSE4_1 |
| VMULPD | Multiply Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VMULPS | Multiply Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VMULSD | Multiply Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VMULSS | Multiply Scalar Single-Precision Floating-Point Values | AVX, AVX512F, SSE |
| VORPD | Bitwise Logical OR of Packed Double Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE2 |
| VORPS | Bitwise Logical OR of Packed Single Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE |
| VPABSB | Packed Absolute Value | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| VPABSD | Packed Absolute Value | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| VPABSQ | Packed Absolute Value | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| VPABSW | Packed Absolute Value | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| VPACKSSDW | Pack with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPACKSSWB | Pack with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPACKUSDW | Pack with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, SSE4_1 |
| VPACKUSWB | Pack with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPADDB | Add Packed Integers | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPADDD | Add Packed Integers | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPADDQ | Add Packed Integers | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPADDSB | Add Packed Signed Integers with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPADDSW | Add Packed Signed Integers with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPADDUSB | Add Packed Unsigned Integers with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPADDUSW | Add Packed Unsigned Integers with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPADDW | Add Packed Integers | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPALIGNR | Packed Align Right | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| VPAND | Logical AND | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPANDD | Logical AND | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPANDN | Logical AND NOT | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPANDND | Logical AND NOT | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPANDNQ | Logical AND NOT | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPANDQ | Logical AND | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPAVGB | Average Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2 |
| VPAVGW | Average Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2 |
| VPBLENDD | Blend Packed Dwords | AVX2 |
| VPBLENDMB | Blend Byte/Word Vectors Using an Opmask Control | AVX512BW, AVX512VL |
| VPBLENDMD | Blend Int32/Int64 Vectors Using an OpMask Control | AVX512F, AVX512VL |
| VPBLENDMQ | Blend Int32/Int64 Vectors Using an OpMask Control | AVX512F, AVX512VL |
| VPBLENDMW | Blend Byte/Word Vectors Using an Opmask Control | AVX512BW, AVX512VL |
| VPBLENDVB | Variable Blend Packed Bytes | AVX, AVX2, SSE4_1 |
| VPBLENDW | Blend Packed Words | AVX, AVX2, SSE4_1 |
| VPBROADCASTB | Load with Broadcast Integer Data from General Purpose Register | AVX512BW, AVX512F, AVX512VL |
| VPBROADCASTD | Load with Broadcast Integer Data from General Purpose Register | AVX512BW, AVX512F, AVX512VL |
| VPBROADCASTMB2Q | Broadcast Mask to Vector Register | AVX512CD, AVX512VL |
| VPBROADCASTMW2D | Broadcast Mask to Vector Register | AVX512CD, AVX512VL |
| VPBROADCASTQ | Load with Broadcast Integer Data from General Purpose Register | AVX512BW, AVX512F, AVX512VL |
| VPBROADCASTW | Load with Broadcast Integer Data from General Purpose Register | AVX512BW, AVX512F, AVX512VL |
| VPCLMULQDQ | PCLMULQDQ - Carry-Less Multiplication Quadword | AVX, PCLMULQDQ |
| VPCMPB | Compare Packed Byte Values Into Mask | AVX512BW, AVX512VL |
| VPCMPD | Compare Packed Integer Values into Mask | AVX512F, AVX512VL |
| VPCMPEQB | Compare Packed Data for Equal | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPCMPEQD | Compare Packed Data for Equal | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPCMPEQQ | Compare Packed Qword Data for Equal | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VPCMPEQW | Compare Packed Data for Equal | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPCMPESTRI | Packed Compare Explicit Length Strings, Return Index | AVX, SSE4_2 |
| VPCMPESTRM | Packed Compare Explicit Length Strings, Return Mask | AVX, SSE4_2 |
| VPCMPGTB | Compare Packed Signed Integers for Greater Than | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPCMPGTD | Compare Packed Signed Integers for Greater Than | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPCMPGTQ | Compare Packed Data for Greater Than | AVX, AVX2, AVX512F, AVX512VL, SSE4_2 |
| VPCMPGTW | Compare Packed Signed Integers for Greater Than | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPCMPISTRI | Packed Compare Implicit Length Strings, Return Index | AVX, SSE4_2 |
| VPCMPISTRM | Packed Compare Implicit Length Strings, Return Mask | AVX, SSE4_2 |
| VPCMPQ | Compare Packed Integer Values into Mask | AVX512F, AVX512VL |
| VPCMPUB | Compare Packed Byte Values Into Mask | AVX512BW, AVX512VL |
| VPCMPUD | Compare Packed Integer Values into Mask | AVX512F, AVX512VL |
| VPCMPUQ | Compare Packed Integer Values into Mask | AVX512F, AVX512VL |
| VPCMPUW | Compare Packed Word Values Into Mask | AVX512BW, AVX512VL |
| VPCMPW | Compare Packed Word Values Into Mask | AVX512BW, AVX512VL |
| VPCOMPRESSD | Store Sparse Packed Doubleword Integer Values into Dense Memory/Register | AVX512F, AVX512VL |
| VPCOMPRESSQ | Store Sparse Packed Quadword Integer Values into Dense Memory/Register | AVX512F, AVX512VL |
| VPCONFLICTD | Detect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register | AVX512CD, AVX512VL |
| VPCONFLICTQ | Detect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register | AVX512CD, AVX512VL |
| VPERM2F128 | Permute Floating-Point Values | AVX |
| VPERM2I128 | Permute Integer Values | AVX2 |
| VPERMD | Permute Packed Doublewords/Words Elements | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPERMI2D | Full Permute From Two Tables Overwriting the Index | AVX512BW, AVX512F, AVX512VL |
| VPERMI2PD | Full Permute From Two Tables Overwriting the Index | AVX512BW, AVX512F, AVX512VL |
| VPERMI2PS | Full Permute From Two Tables Overwriting the Index | AVX512BW, AVX512F, AVX512VL |
| VPERMI2Q | Full Permute From Two Tables Overwriting the Index | AVX512BW, AVX512F, AVX512VL |
| VPERMI2W | Full Permute From Two Tables Overwriting the Index | AVX512BW, AVX512F, AVX512VL |
| VPERMILPD | Permute In-Lane of Pairs of Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| VPERMILPS | Permute In-Lane of Quadruples of Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| VPERMPD | Permute Double-Precision Floating-Point Elements | AVX2, AVX512F, AVX512VL |
| VPERMPS | Permute Single-Precision Floating-Point Elements | AVX2, AVX512F, AVX512VL |
| VPERMQ | Qwords Element Permutation | AVX2, AVX512F, AVX512VL |
| VPERMW | Permute Packed Doublewords/Words Elements | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPEXPANDD | Load Sparse Packed Doubleword Integer Values from Dense Memory / Register | AVX512F, AVX512VL |
| VPEXPANDQ | Load Sparse Packed Quadword Integer Values from Dense Memory / Register | AVX512F, AVX512VL |
| VPEXTRB | Extract Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| VPEXTRD | Extract Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| VPEXTRQ | Extract Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| VPEXTRW | Extract Word | AVX, AVX512BW, SSE, SSE2, SSE4_1 |
| VPGATHERDD | Gather Packed Dword Values Using Signed Dword/Qword Indices | AVX2 |
| VPGATHERDQ | Gather Packed Qword Values Using Signed Dword/Qword Indices | AVX2 |
| VPGATHERQD | Gather Packed Dword, Packed Qword with Signed Qword Indices | AVX512F, AVX512VL |
| VPGATHERQQ | Gather Packed Dword, Packed Qword with Signed Qword Indices | AVX512F, AVX512VL |
| VPHADDD | Packed Horizontal Add | AVX, AVX2, SSSE3 |
| VPHADDSW | Packed Horizontal Add and Saturate | AVX, AVX2, SSSE3 |
| VPHADDW | Packed Horizontal Add | AVX, AVX2, SSSE3 |
| VPHMINPOSUW | Packed Horizontal Word Minimum | AVX, SSE4_1 |
| VPHSUBD | Packed Horizontal Subtract | AVX, AVX2, SSSE3 |
| VPHSUBSW | Packed Horizontal Subtract and Saturate | AVX, AVX2, SSSE3 |
| VPHSUBW | Packed Horizontal Subtract | AVX, AVX2, SSSE3 |
| VPINSRB | Insert Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| VPINSRD | Insert Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| VPINSRQ | Insert Byte/Dword/Qword | AVX, AVX512BW, AVX512DQ, SSE4_1 |
| VPINSRW | Insert Word | AVX, AVX512BW, SSE, SSE2 |
| VPLZCNTD | Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values | AVX512CD, AVX512VL |
| VPLZCNTQ | Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values | AVX512CD, AVX512VL |
| VPMADDUBSW | Multiply and Add Packed Signed and Unsigned Bytes | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| VPMADDWD | Multiply and Add Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPMASKMOVD | Conditional SIMD Integer Packed Loads and Stores | AVX2 |
| VPMASKMOVQ | Conditional SIMD Integer Packed Loads and Stores | AVX2 |
| VPMAXSB | Maximum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMAXSD | Maximum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMAXSQ | Maximum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMAXSW | Maximum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMAXUB | Maximum of Packed Unsigned Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMAXUD | Maximum of Packed Unsigned Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VPMAXUQ | Maximum of Packed Unsigned Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VPMAXUW | Maximum of Packed Unsigned Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMINSB | Minimum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMINSD | Minimum of Packed Signed Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VPMINSQ | Minimum of Packed Signed Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VPMINSW | Minimum of Packed Signed Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMINUB | Minimum of Packed Unsigned Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMINUD | Minimum of Packed Unsigned Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VPMINUQ | Minimum of Packed Unsigned Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VPMINUW | Minimum of Packed Unsigned Integers | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2, SSE4_1 |
| VPMOVB2M | Convert a Vector Register to a Mask | AVX512BW, AVX512DQ, AVX512VL |
| VPMOVD2M | Convert a Vector Register to a Mask | AVX512BW, AVX512DQ, AVX512VL |
| VPMOVDB | Down Convert DWord to Byte | AVX512F, AVX512VL |
| VPMOVDW | Down Convert DWord to Word | AVX512F, AVX512VL |
| VPMOVM2B | Convert a Mask Register to a Vector Register | AVX512BW, AVX512DQ, AVX512VL |
| VPMOVM2D | Convert a Mask Register to a Vector Register | AVX512BW, AVX512DQ, AVX512VL |
| VPMOVM2Q | Convert a Mask Register to a Vector Register | AVX512BW, AVX512DQ, AVX512VL |
| VPMOVM2W | Convert a Mask Register to a Vector Register | AVX512BW, AVX512DQ, AVX512VL |
| VPMOVMSKB | Move Byte Mask | AVX, AVX2, SSE, SSE2 |
| VPMOVQ2M | Convert a Vector Register to a Mask | AVX512BW, AVX512DQ, AVX512VL |
| VPMOVQB | Down Convert QWord to Byte | AVX512F, AVX512VL |
| VPMOVQD | Down Convert QWord to DWord | AVX512F, AVX512VL |
| VPMOVQW | Down Convert QWord to Word | AVX512F, AVX512VL |
| VPMOVSDB | Down Convert DWord to Byte | AVX512F, AVX512VL |
| VPMOVSDW | Down Convert DWord to Word | AVX512F, AVX512VL |
| VPMOVSQB | Down Convert QWord to Byte | AVX512F, AVX512VL |
| VPMOVSQD | Down Convert QWord to DWord | AVX512F, AVX512VL |
| VPMOVSQW | Down Convert QWord to Word | AVX512F, AVX512VL |
| VPMOVSWB | Down Convert Word to Byte | AVX512BW, AVX512VL |
| VPMOVSXBD | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| VPMOVSXBQ | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| VPMOVSXBW | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| VPMOVSXDQ | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| VPMOVSXWD | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| VPMOVSXWQ | Packed Move with Sign Extend | AVX, AVX2, SSE4_1 |
| VPMOVUSDB | Down Convert DWord to Byte | AVX512F, AVX512VL |
| VPMOVUSDW | Down Convert DWord to Word | AVX512F, AVX512VL |
| VPMOVUSQB | Down Convert QWord to Byte | AVX512F, AVX512VL |
| VPMOVUSQD | Down Convert QWord to DWord | AVX512F, AVX512VL |
| VPMOVUSQW | Down Convert QWord to Word | AVX512F, AVX512VL |
| VPMOVUSWB | Down Convert Word to Byte | AVX512BW, AVX512VL |
| VPMOVW2M | Convert a Vector Register to a Mask | AVX512BW, AVX512DQ, AVX512VL |
| VPMOVWB | Down Convert Word to Byte | AVX512BW, AVX512VL |
| VPMOVZXBD | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| VPMOVZXBQ | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| VPMOVZXBW | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| VPMOVZXDQ | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| VPMOVZXWD | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| VPMOVZXWQ | Packed Move with Zero Extend | AVX, AVX2, SSE4_1 |
| VPMULDQ | Multiply Packed Doubleword Integers | AVX, AVX2, AVX512F, AVX512VL, SSE4_1 |
| VPMULHRSW | Packed Multiply High with Round and Scale | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| VPMULHUW | Multiply Packed Unsigned Integers and Store High Result | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2 |
| VPMULHW | Multiply Packed Signed Integers and Store High Result | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPMULLD | Multiply Packed Integers and Store Low Result | AVX, AVX2, AVX512DQ, AVX512F, AVX512VL, SSE4_1 |
| VPMULLQ | Multiply Packed Integers and Store Low Result | AVX, AVX2, AVX512DQ, AVX512F, AVX512VL, SSE4_1 |
| VPMULLW | Multiply Packed Signed Integers and Store Low Result | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPMULUDQ | Multiply Packed Unsigned Doubleword Integers | AVX, AVX2, AVX512F, AVX512VL, SSE2 |
| VPOR | Bitwise Logical OR | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPORD | Bitwise Logical OR | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPORQ | Bitwise Logical OR | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPROLD | Bit Rotate Left | AVX512F, AVX512VL |
| VPROLQ | Bit Rotate Left | AVX512F, AVX512VL |
| VPROLVD | Bit Rotate Left | AVX512F, AVX512VL |
| VPROLVQ | Bit Rotate Left | AVX512F, AVX512VL |
| VPRORD | Bit Rotate Right | AVX512F, AVX512VL |
| VPRORQ | Bit Rotate Right | AVX512F, AVX512VL |
| VPRORVD | Bit Rotate Right | AVX512F, AVX512VL |
| VPRORVQ | Bit Rotate Right | AVX512F, AVX512VL |
| VPSADBW | Compute Sum of Absolute Differences | AVX, AVX2, AVX512BW, AVX512VL, SSE, SSE2 |
| VPSCATTERDD | Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices | AVX512F, AVX512VL |
| VPSCATTERDQ | Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices | AVX512F, AVX512VL |
| VPSCATTERQD | Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices | AVX512F, AVX512VL |
| VPSCATTERQQ | Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices | AVX512F, AVX512VL |
| VPSHUFB | Packed Shuffle Bytes | AVX, AVX2, AVX512BW, AVX512VL, SSSE3 |
| VPSHUFD | Shuffle Packed Doublewords | AVX, AVX2, AVX512F, AVX512VL, SSE2 |
| VPSHUFHW | Shuffle Packed High Words | AVX, AVX2, AVX512BW, AVX512VL, SSE2 |
| VPSHUFLW | Shuffle Packed Low Words | AVX, AVX2, AVX512BW, AVX512VL, SSE2 |
| VPSIGNB | Packed SIGN | AVX, AVX2, SSSE3 |
| VPSIGND | Packed SIGN | AVX, AVX2, SSSE3 |
| VPSIGNW | Packed SIGN | AVX, AVX2, SSSE3 |
| VPSLLD | Shift Packed Data Left Logical | AVX, AVX2, MMX, SSE2 |
| VPSLLDQ | Shift Double Quadword Left Logical | AVX, AVX2, AVX512BW, AVX512VL, SSE2 |
| VPSLLQ | Shift Packed Data Left Logical | AVX, AVX2, MMX, SSE2 |
| VPSLLVD | Variable Bit Shift Left Logical | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSLLVQ | Variable Bit Shift Left Logical | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSLLVW | Variable Bit Shift Left Logical | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSLLW | Shift Packed Data Left Logical | AVX, AVX2, MMX, SSE2 |
| VPSRAD | Shift Packed Data Right Arithmetic | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSRAQ | Shift Packed Data Right Arithmetic | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSRAVD | Variable Bit Shift Right Arithmetic | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSRAVQ | Variable Bit Shift Right Arithmetic | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSRAVW | Variable Bit Shift Right Arithmetic | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSRAW | Shift Packed Data Right Arithmetic | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSRLD | Shift Packed Data Right Logical | AVX, AVX2, MMX, SSE2 |
| VPSRLDQ | Shift Double Quadword Right Logical | AVX, AVX2, AVX512BW, AVX512VL, SSE2 |
| VPSRLQ | Shift Packed Data Right Logical | AVX, AVX2, MMX, SSE2 |
| VPSRLVD | Variable Bit Shift Right Logical | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSRLVQ | Variable Bit Shift Right Logical | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSRLVW | Variable Bit Shift Right Logical | AVX2, AVX512BW, AVX512F, AVX512VL |
| VPSRLW | Shift Packed Data Right Logical | AVX, AVX2, MMX, SSE2 |
| VPSUBB | Subtract Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSUBD | Subtract Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSUBQ | Subtract Packed Quadword Integers | AVX, AVX2, AVX512F, AVX512VL, SSE2 |
| VPSUBSB | Subtract Packed Signed Integers with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSUBSW | Subtract Packed Signed Integers with Signed Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSUBUSB | Subtract Packed Unsigned Integers with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSUBUSW | Subtract Packed Unsigned Integers with Unsigned Saturation | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPSUBW | Subtract Packed Integers | AVX, AVX2, AVX512BW, AVX512VL, MMX, SSE2 |
| VPTERNLOGD | Bitwise Ternary Logic | AVX512F, AVX512VL |
| VPTERNLOGQ | Bitwise Ternary Logic | AVX512F, AVX512VL |
| VPTEST | PTEST- Logical Compare | AVX, SSE4_1 |
| VPTESTMB | Logical AND and Set Mask | AVX512BW, AVX512F, AVX512VL |
| VPTESTMD | Logical AND and Set Mask | AVX512BW, AVX512F, AVX512VL |
| VPTESTMQ | Logical AND and Set Mask | AVX512BW, AVX512F, AVX512VL |
| VPTESTMW | Logical AND and Set Mask | AVX512BW, AVX512F, AVX512VL |
| VPTESTNMB | Logical NAND and Set | AVX512BW, AVX512F, AVX512VL |
| VPTESTNMD | Logical NAND and Set | AVX512BW, AVX512F, AVX512VL |
| VPTESTNMQ | Logical NAND and Set | AVX512BW, AVX512F, AVX512VL |
| VPTESTNMW | Logical NAND and Set | AVX512BW, AVX512F, AVX512VL |
| VPUNPCKHBW | Unpack High Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPUNPCKHDQ | Unpack High Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPUNPCKHQDQ | Unpack High Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPUNPCKHWD | Unpack High Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPUNPCKLBW | Unpack Low Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPUNPCKLDQ | Unpack Low Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPUNPCKLQDQ | Unpack Low Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPUNPCKLWD | Unpack Low Data | AVX, AVX2, AVX512BW, AVX512F, AVX512VL, MMX, SSE2 |
| VPXOR | Logical Exclusive OR | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPXORD | Logical Exclusive OR | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VPXORQ | Logical Exclusive OR | AVX, AVX2, AVX512F, AVX512VL, MMX, SSE2 |
| VRANGEPD | Range Restriction Calculation For Packed Pairs of Float64 Values | AVX512DQ, AVX512VL |
| VRANGEPS | Range Restriction Calculation For Packed Pairs of Float32 Values | AVX512DQ, AVX512VL |
| VRANGESD | Range Restriction Calculation From a pair of Scalar Float64 Values | AVX512DQ |
| VRANGESS | Range Restriction Calculation From a Pair of Scalar Float32 Values | AVX512DQ |
| VRCP14PD | Compute Approximate Reciprocals of Packed Float64 Values | AVX512F, AVX512VL |
| VRCP14PS | Compute Approximate Reciprocals of Packed Float32 Values | AVX512F, AVX512VL |
| VRCP14SD | Compute Approximate Reciprocal of Scalar Float64 Value | AVX512F |
| VRCP14SS | Compute Approximate Reciprocal of Scalar Float32 Value | AVX512F |
| VRCP28PD | Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error | AVX512ER |
| VRCP28PS | Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error | AVX512ER |
| VRCP28SD | Approximation to the Reciprocal of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error | AVX512ER |
| VRCP28SS | Approximation to the Reciprocal of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error | AVX512ER |
| VRCPPS | Compute Reciprocals of Packed Single-Precision Floating-Point Values | AVX, SSE |
| VRCPSS | Compute Reciprocal of Scalar Single-Precision Floating-Point Values | AVX, SSE |
| VREDUCEPD | Perform Reduction Transformation on Packed Float64 Values | AVX512DQ, AVX512VL |
| VREDUCEPS | Perform Reduction Transformation on Packed Float32 Values | AVX512DQ, AVX512VL |
| VREDUCESD | Perform a Reduction Transformation on a Scalar Float64 Value | AVX512DQ |
| VREDUCESS | Perform a Reduction Transformation on a Scalar Float32 Value | AVX512DQ |
| VRNDSCALEPD | Round Packed Float64 Values To Include A Given Number Of Fraction Bits | AVX512F, AVX512VL |
| VRNDSCALEPS | Round Packed Float32 Values To Include A Given Number Of Fraction Bits | AVX512F, AVX512VL |
| VRNDSCALESD | Round Scalar Float64 Value To Include A Given Number Of Fraction Bits | AVX512F |
| VRNDSCALESS | Round Scalar Float32 Value To Include A Given Number Of Fraction Bits | AVX512F |
| VROUNDPD | Round Packed Double Precision Floating-Point Values | AVX, SSE4_1 |
| VROUNDPS | Round Packed Single Precision Floating-Point Values | AVX, SSE4_1 |
| VROUNDSD | Round Scalar Double Precision Floating-Point Values | AVX, SSE4_1 |
| VROUNDSS | Round Scalar Single Precision Floating-Point Values | AVX, SSE4_1 |
| VRSQRT14PD | Compute Approximate Reciprocals of Square Roots of Packed Float64 Values | AVX512F, AVX512VL |
| VRSQRT14PS | Compute Approximate Reciprocals of Square Roots of Packed Float32 Values | AVX512F, AVX512VL |
| VRSQRT14SD | Compute Approximate Reciprocal of Square Root of Scalar Float64 Value | AVX512F |
| VRSQRT14SS | Compute Approximate Reciprocal of Square Root of Scalar Float32 Value | AVX512F |
| VRSQRT28PD | Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error | AVX512ER |
| VRSQRT28PS | Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error | AVX512ER |
| VRSQRT28SD | Approximation to the Reciprocal Square Root of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error | AVX512ER |
| VRSQRT28SS | Approximation to the Reciprocal Square Root of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error | AVX512ER |
| VRSQRTPS | Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values | AVX, SSE |
| VRSQRTSS | Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value | AVX, SSE |
| VSCALEFPD | Scale Packed Float64 Values With Float64 Values | AVX512F, AVX512VL |
| VSCALEFPS | Scale Packed Float32 Values With Float32 Values | AVX512F, AVX512VL |
| VSCALEFSD | Scale Scalar Float64 Values With Float64 Values | AVX512F |
| VSCALEFSS | Scale Scalar Float32 Value With Float32 Value | AVX512F |
| VSCATTERDPD | Scatter Packed Single, Packed Double with Signed Dword and Qword Indices | AVX512F, AVX512VL |
| VSCATTERDPS | Scatter Packed Single, Packed Double with Signed Dword and Qword Indices | AVX512F, AVX512VL |
| VSCATTERPF0DPD | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write | AVX512PF |
| VSCATTERPF0DPS | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write | AVX512PF |
| VSCATTERPF0QPD | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write | AVX512PF |
| VSCATTERPF0QPS | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write | AVX512PF |
| VSCATTERPF1DPD | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write | AVX512PF |
| VSCATTERPF1DPS | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write | AVX512PF |
| VSCATTERPF1QPD | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write | AVX512PF |
| VSCATTERPF1QPS | Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write | AVX512PF |
| VSCATTERQPD | Scatter Packed Single, Packed Double with Signed Dword and Qword Indices | AVX512F, AVX512VL |
| VSCATTERQPS | Scatter Packed Single, Packed Double with Signed Dword and Qword Indices | AVX512F, AVX512VL |
| VSHUFF32x4 | Shuffle Packed Values at 128-bit Granularity | AVX512F, AVX512VL |
| VSHUFF64x2 | Shuffle Packed Values at 128-bit Granularity | AVX512F, AVX512VL |
| VSHUFI32x4 | Shuffle Packed Values at 128-bit Granularity | AVX512F, AVX512VL |
| VSHUFI64x2 | Shuffle Packed Values at 128-bit Granularity | AVX512F, AVX512VL |
| VSHUFPD | Packed Interleave Shuffle of Pairs of Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VSHUFPS | Packed Interleave Shuffle of Quadruplets of Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VSQRTPD | Square Root of Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VSQRTPS | Square Root of Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VSQRTSD | Compute Square Root of Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VSQRTSS | Compute Square Root of Scalar Single-Precision Value | AVX, AVX512F, SSE |
| VSTMXCSR | Store MXCSR Register State | AVX, SSE |
| VSUBPD | Subtract Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE2 |
| VSUBPS | Subtract Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL, SSE |
| VSUBSD | Subtract Scalar Double-Precision Floating-Point Value | AVX, AVX512F, SSE2 |
| VSUBSS | Subtract Scalar Single-Precision Floating-Point Value | AVX, AVX512F, SSE |
| VTESTPD | Packed Bit Test | AVX |
| VTESTPS | Packed Bit Test | AVX |
| VUCOMISD | Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS | AVX, AVX512F, SSE2 |
| VUCOMISS | Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS | AVX, AVX512F, SSE |
| VUNPCKHPD | Unpack and Interleave High Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| VUNPCKHPS | Unpack and Interleave High Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| VUNPCKLPD | Unpack and Interleave Low Packed Double-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| VUNPCKLPS | Unpack and Interleave Low Packed Single-Precision Floating-Point Values | AVX, AVX512F, AVX512VL |
| VXORPD | Bitwise Logical XOR of Packed Double Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL |
| VXORPS | Bitwise Logical XOR of Packed Single Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE |
| VZEROALL | Zero All YMM Registers | AVX |
| VZEROUPPER | Zero Upper Bits of YMM Registers | AVX |
| WAIT | Wait | |
| WBINVD | Write Back and Invalidate Cache | |
| WRFSBASE | Write FS/GS Segment Base | FSGSBASE |
| WRGSBASE | Write FS/GS Segment Base | FSGSBASE |
| WRMSR | Write to Model Specific Register | |
| WRPKRU | Write Data to User Page Key Register | |
| XABORT | Transactional Abort | RTM |
| XACQUIRE | Hardware Lock Elision Prefix Hints | HLE |
| XADD | Exchange and Add | |
| XBEGIN | Transactional Begin | RTM |
| XCHG | Exchange Register/Memory with Register | |
| XEND | Transactional End | RTM |
| XGETBV | Get Value of Extended Control Register | |
| XLAT | Table Look-up Translation | |
| XLATB | Table Look-up Translation | |
| XOR | Logical Exclusive OR | |
| XORPD | Bitwise Logical XOR of Packed Double Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL |
| XORPS | Bitwise Logical XOR of Packed Single Precision Floating-Point Values | AVX, AVX512DQ, AVX512VL, SSE |
| XRELEASE | Hardware Lock Elision Prefix Hints | HLE |
| XRSTOR | Restore Processor Extended States | |
| XRSTORS | Restore Processor Extended States Supervisor | |
| XSAVE | Save Processor Extended States | |
| XSAVEC | Save Processor Extended States with Compaction | |
| XSAVEOPT | Save Processor Extended States Optimized | XSAVEOPT |
| XSAVES | Save Processor Extended States Supervisor | |
| XSETBV | Set Extended Control Register | |
| XTEST | Test If In Transactional Execution | HLE, RTM |