HalfVulpes's Stars
risclite/SuperScalar-RISCV-CPU
SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.
eembc/coremark
CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).
DHDAXCW/OpenWrt_RockChip
基于 lede-rockchip 源码建构 rockchip 的 OpenWrt 固件。
liangkangnan/tinyriscv
A very simple and easy to understand RISC-V core.
LoveLonelyTime/Bergamot
An exquisite superscalar RV32GC processor.
litex-hub/linux-on-litex-vexriscv
Linux on LiteX-VexRiscv
enjoy-digital/litex
Build your hardware, easily!
SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
SanjayRai/SRAI_HW_ACCEL_WINDOWS10_PCIe
PCIe based accelerator for VCU1525 with xDMA based on Windows10 and Windows Server 2016 development environment
Xilinx/dma_ip_drivers
Xilinx QDMA IP Drivers
gangweiX/ACVNet
[TPAMI 2024 & CVPR 2022] Attention Concatenation Volume for Accurate and Efficient Stereo Matching
google-research/google-research
Google Research
ibaiGorordo/HITNET-Stereo-Depth-estimation
Python scripts for performing stereo depth estimation using the HITNET Tensorflow model.
xiangfuli/STM32_freeRTOS_CMake_template
This project is an initial project template for programming STM32F4 devices with FreeRTOS support
tow3rs/catapult-v3-smartnic-re
Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)
espressif/esp-idf
Espressif IoT Development Framework. Official development framework for Espressif SoCs.
wentaoyuan/deepgmr
PyTorch implementation of DeepGMR: Learning Latent Gaussian Mixture Models for Registration (ECCV 2020 spotlight)
Qv2ray/Qv2ray
:star: Linux / Windows / macOS 跨平台 V2Ray 客户端 | 支持 VMess / VLESS / SSR / Trojan / Trojan-Go / NaiveProxy / HTTP / HTTPS / SOCKS5 | 使用 C++ / Qt 开发 | 可拓展插件式设计 :star:
jofrfu/tinyTPU
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
teknohog/Xilinx-Serial-Miner
Bitcoin miner for Xilinx FPGAs
emakefun/RaspberryPi-MotorDriverBoard
donny681/ESP32_CAMERA_QR
xai-org/grok-1
Grok open release
Digilent/vivado-library
xjtuecho/EBAZ4205
A 5$ Xilinx ZYNQ development board.
CMU-SAFARI/MQSim
MQSim is a fast and accurate simulator modeling the performance of modern multi-queue (MQ) SSDs as well as traditional SATA based SSDs. MQSim faithfully models new high-bandwidth protocol implementations, steady-state SSD conditions, and the full end-to-end latency of requests in modern SSDs. It is described in detail in the FAST 2018 paper by Arash Tavakkol et al., "MQSim: A Framework for Enabling Realistic Studies of Modern Multi-Queue SSD Devices" (https://people.inf.ethz.ch/omutlu/pub/MQSim-SSD-simulation-framework_fast18.pdf)
axboe/fio
Flexible I/O Tester
zju3dv/NeuralRecon
Code for "NeuralRecon: Real-Time Coherent 3D Reconstruction from Monocular Video", CVPR 2021 oral
snu-csl/nvmevirt
NVMeVirt: A Versatile Software-defined Virtual NVMe Device
cjhonlyone/NandFlashController
AXI Interface Nand Flash Controller (Sync mode)