HalfVulpes

HalfVulpes's Stars

• google-research/google-research

  Google Research

  Language:Jupyter Notebook34.6k7561.3k8k

• 2noise/ChatTTS

  A generative speech model for daily dialogue.

  Language:Python33.3k1915833.6k

• Qv2ray/Qv2ray

  :star: Linux / Windows / macOS 跨平台 V2Ray 客户端 | 支持 VMess / VLESS / SSR / Trojan / Trojan-Go / NaiveProxy / HTTP / HTTPS / SOCKS5 | 使用 C++ / Qt 开发 | 可拓展插件式设计 :star:

  Language:C++16.8k2661.2k3.3k

• espressif/esp-idf

  Espressif IoT Development Framework. Official development framework for Espressif SoCs.

  Language:C14.1k50112.9k7.4k

• gaoxiang12/slambook

  Language:C++7k2722733.3k

• enjoy-digital/litex

  Build your hardware, easily!

  Language:C3.1k97835578

• SI-RISCV/e200_opensource

  Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

  Language:Verilog2.6k229431k

• SpinalHDL/VexRiscv

  A FPGA friendly 32 bit RISC-V CPU implementation

  Language:Assembly2.5k102337422

• riscv-mcu/e203_hbirdv2

  The Ultra-Low Power RISC-V Core

  Language:Verilog1.3k3721348

• liangkangnan/tinyriscv

  A very simple and easy to understand RISC-V core.

  Language:C1.1k178191

• eembc/coremark

  CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).

  Language:C9863032329

• ultraembedded/biriscv

  32-bit Superscalar RISC-V CPU

  Language:Verilog8983025151

• litex-hub/linux-on-litex-vexriscv

  Linux on LiteX-VexRiscv

  Language:Python59644285176

• Xilinx/dma_ip_drivers

  Xilinx QDMA IP Drivers

  Language:C59548191427

• gangweiX/ACVNet

  [TPAMI 2024 & CVPR 2022] Attention Concatenation Volume for Accurate and Efficient Stereo Matching

  Language:Python471313863

• jofrfu/tinyTPU

  Implementation of a Tensor Processing Unit for embedded systems and the IoT.

  Language:VHDL405235262

• DHDAXCW/OpenWrt_RockChip

  基于 lede-rockchip 源码建构 rockchip 的 OpenWrt 固件。

  Language:Shell24155269

• risclite/SuperScalar-RISCV-CPU

  SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

  Language:SystemVerilog20214342

• cggos/shenlan_vio_course

  深蓝学院《视觉SLAM进阶：从零开始手写VIO》第一期

  Language:C++1886060

• wentaoyuan/deepgmr

  PyTorch implementation of DeepGMR: Learning Latent Gaussian Mixture Models for Registration (ECCV 2020 spotlight)

  Language:Python15081115

• LoveLonelyTime/Bergamot

  An exquisite superscalar RV32GC processor.

  Language:Scala1443013

• ibaiGorordo/HITNET-Stereo-Depth-estimation

  Python scripts for performing stereo depth estimation using the HITNET Tensorflow model.

  Language:Python1304920

• tow3rs/catapult-v3-smartnic-re

  Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)

  Language:VHDL1197326

• Gralerfics/FmcPGA

  A pseudo Minecraft game running on Artix-7 FPGA in VHDL. Also the final project for SUSTech EE332-Digital-System-Designing.

  Language:VHDL69204

• maswx/vu13p

  国产VU13P加速卡资料

  Language:C615716

• SanjayRai/SRAI_HW_ACCEL_WINDOWS10_PCIe

  PCIe based accelerator for VCU1525 with xDMA based on Windows10 and Windows Server 2016 development environment

  Language:VHDL523225

• d953i/SQRL_FK33

  SQRL FK33 board files, example designs and scripts.

  Language:Tcl166112

• stamcenter/Trireme_Platform

  Language:Verilog4301

• devinatkin/tt07-dual-oscillator

  Two Oscillator Outputs 20Mhz, 21Mhz Target Frequencies

  Language:Makefile2200

• xiangfuli/STM32_freeRTOS_CMake_template

  This project is an initial project template for programming STM32F4 devices with FreeRTOS support

  Language:C2101