/HDL_Based-Hardware-Testing-2

Writing Structural Style Verilog for some logic functions!

Primary LanguageVerilog

HDL_Based-Hardware-Testing-2

Another problem for testing hardware

Create structural style Verilog modules for the following logic functions: (a) X = ~A + (B ⊕ ~C) (b) Y = (A.B) + (~B.C) (c) Z = A + ~(B ⊕ C).(A + B)