HanJinChi

undergraduate:ShanDong University(2018-2022) postgraduate:Institute of Information Engineering(2022-2025)

Pinned Repositories

cache-model
A behavioural cache model for analysing the cache behaviour under side-channel attack.
Language:C++22 2 03
FlexiCAS
A Flexible Cache Architectural Simulator
Language:C++11 2 153
spike-flexicas
Language:C2 2 13
FlexiCAS
A Flexible Cache Architectural Simulator
Language:C++00
cache-model
A behavioural cache model for analysing the cache behaviour under side-channel attack.
Language:C++00
nvboard
NJU Virtual Board
Language:C++00
prism
Modular, flexible, cross-platform workload profiling and characterization
Language:C00
ysyx-workbench
Language:C00
zsim
A fast and scalable x86-64 multicore simulator
Language:C++00

HanJinChi's Repositories

HanJinChi/cache-model
A behavioural cache model for analysing the cache behaviour under side-channel attack.
Language:C++00
HanJinChi/nvboard
NJU Virtual Board
Language:C++00
HanJinChi/prism
Modular, flexible, cross-platform workload profiling and characterization
Language:C00
HanJinChi/ysyx-workbench
Language:C00