HarshiniMurugesanV

INFUSION_PUMP

VLSI_CIRCUIT_DESIGN

AN-EFFICIENT-LOW-POWER-CMOS-IMPLEMENTATION-OF-THE-SRAM-CELL

A Static Random Access Memory (SRAM) is designed to provide a interface with the CPU at speeds not attainable by DRAMs. The existing method is an ultra-low-voltage bit-interleaved synthesizable 13T SRAM circuit. Hence, the proposed model involves 6T SRAM cell in CMOS technology with channel length of 55nm. The design is held in SPICE Simulation.

DETECTION-OF-ANGLE-USING-ACCELEROMETER-SENSOR

The main purpose of this project is to determine the angle of the desired object. Here, the angle is measured by the accelerometer sensor. Accelerometer sensor are used to sense the orientation, coordinate the acceleration and vibration.

HarshiniMurugesanV/DETECTION-OF-ANGLE-USING-ACCELEROMETER-SENSOR

The main purpose of this project is to determine the angle of the desired object. Here, the angle is measured by the accelerometer sensor. Accelerometer sensor are used to sense the orientation, coordinate the acceleration and vibration.

HarshiniMurugesanV/AN-EFFICIENT-LOW-POWER-CMOS-IMPLEMENTATION-OF-THE-SRAM-CELL

A Static Random Access Memory (SRAM) is designed to provide a interface with the CPU at speeds not attainable by DRAMs. The existing method is an ultra-low-voltage bit-interleaved synthesizable 13T SRAM circuit. Hence, the proposed model involves 6T SRAM cell in CMOS technology with channel length of 55nm. The design is held in SPICE Simulation.

HarshiniMurugesanV/INFUSION_PUMP

HarshiniMurugesanV/VLSI_CIRCUIT_DESIGN