/IHW

Programming a MIPS CPU in verilog.

Primary LanguageVHDL

IHW

Programming a MIPS CPU in verilog.

TIPO R // SEM DIV E 3 INSTRUCOES FUNCIONAM SO NA TEORIA

  • add
  • and
  • sub
  • break
  • rte
  • jr
  • sll
  • sllv
  • sra
  • srav
  • srl
  • slt
  • mfhi (teoricamente)
  • mflo (teoricamente)
  • mult (nao funfa)

TIPO I // TUDOO IHUU

  • addi
  • addiu
  • beq
  • bne
  • bgt
  • ble
  • lb
  • lh
  • lw
  • lui
  • sw
  • sh
  • sb
  • slti

TIPO J // TUDOO IHUU

  • j
  • jal
  • inc
  • dec