AHIRv2 is a tool-chain developed by Prof. Madhav P Desai and his team at IIT Bombay.
The tool-chain is capable of converting algorithms written in high level language to synthesizable RTL description (VHDL code).
It can also verify the synthesized hardware using C-testbench.
This repository contains some hardware descriptions described using Algorithmic Assembly (Aa) Language.
Several of these are examples or assignments provided as part of the course EE789 at IITB, while few are out of sheer desire to play around.
To learn more about the tool-chain, refer to: https://github.com/madhavPdesai/ahir