AES with SPI

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Project Description

The common encryption technique AES utilizes key sizes of 128, 192, and 256 bits and operates on 128-bit blocks. In this project, we were required to implement encryption and decryption modules for all three key sizes.

The encryption and decryption modules are built with a serial interface that complies with the SPI specification to simplify data transfer and system integration. The modules can send encrypted or decrypted data or receive input data and keys bit-by-bit over a number of clock cycles using the SPI interface. In this project, the widely used SPI mode 0 is utilized.

Furthermore, we needed to implement a thorough testbench that validates the operation of the encryption and decryption modules. To guarantee that the modules operate correctly in a variety of contexts, the testbench employs numerous test cases with varying messages and keys. It has self-checking features and reports how many test cases passed and failed.

A test wrapper is also used to make testing on the DE1-SoC board easier. The encryption and decryption modules' inputs are driven by the test wrapper, which also uses an LED to display the test results. This makes it simple to check the modules' functionality in a hardware setting.

Project Document and References