Pinned Repositories
2020_TI_competion_question_A
2020电赛A题代码整理
30dayMakeOS
《30天自制操作系统》源码中文版。自己制作一个操作系统（OSASK）的过程
8051
8051 core
Accelerating-CNN-with-FPGA
This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.
Adafruit_ADS1X15
Driver for TI's ADS1015: 12-bit Differential or Single-Ended ADC with PGA and Comparator
ADCs
ADC采集项目： 1. 百片多通道ADC采集，大数据量缓存，USB3.0数据上传 难度指数：★★★★☆ 2. 高速低精度、低速高精度ADC信号采集，USB2.0数据上传 难度指数：★★★☆☆
AHB-to-APB-bridge-RTL-design-using-Verilog-HDL
AMBA4-APB
Advanced Pheripheral Bus design using verilog HDL
APB-Verification
verification of APB bus on System Verilog. creating a testbench consisting of modules to check and improve the functional coverage.
hdl
HDL libraries and projects
JJY-99's Repositories
JJY-99/AHB-to-APB-bridge-RTL-design-using-Verilog-HDL
JJY-99/AMBA4-APB
Advanced Pheripheral Bus design using verilog HDL
JJY-99/APB-Verification
verification of APB bus on System Verilog. creating a testbench consisting of modules to check and improve the functional coverage.
JJY-99/ARM_AMBA_Design
Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
JJY-99/aws-fpga
Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
JJY-99/biriscv
32-bit Superscalar RISC-V CPU
JJY-99/Chinese-Translation-of-PCI-Express-Technology-
Chinese Translation on <PCI Express Technology Comprehensive Guide to Generations 1.x, 2.x and 3.0> by Mindshare Mindshare
JJY-99/CNN-On-FPGA
FPGA
JJY-99/cnn_accelerator
【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器
JJY-99/cores
Various HDL (Verilog) IP Cores
JJY-99/Design-and-Verification-of-APB-Protocol-using-UVM
APB Protocol is designed and verified using System Verilog based UVM. The tool used in designing and simulation is EDA Playground.
JJY-99/digital_IC_design_notes
数字IC设计 学习笔记
JJY-99/FPGA-ftdi245fifo
FPGA-based USB fast data transmission using FT232H/FT600 chip. 使用FT232H/FT600芯片进行FPGA与电脑之间的高速数据传输。
JJY-99/FPGA-proj
FPGA project
JJY-99/mipi_csi_receiver_FPGA
MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3. This is now Legacy Version!
JJY-99/my_verilog_projects
数字IC秋招项目、手撕代码
JJY-99/no2usb
Nitro USB FPGA core
JJY-99/openc906
OpenXuantie - OpenC906 Core
JJY-99/openc910
OpenXuantie - OpenC910 Core
JJY-99/opentitan
OpenTitan: Open source silicon root of trust
JJY-99/riscv
RISC-V CPU Core (RV32IM)
JJY-99/spyder
Official repository for Spyder - The Scientific Python Development Environment
JJY-99/tensorflow
An Open Source Machine Learning Framework for Everyone
JJY-99/USB-Implementation
JJY-99/USB-PD-Verilog
USB Type-C Power Delivery FPGA
JJY-99/usb3_pipe
USB3 PIPE interface for Xilinx 7-Series
JJY-99/USB_C_Industrial_Camera_FPGA_USB3
Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.
JJY-99/usbcorev
A full-speed device-side USB peripheral core written in Verilog.
JJY-99/uvma_apb
APB UVM Agent - Moore.io AMBA® IP Suite
JJY-99/verilog_APB_SPI_interface
SPI interface connect to APB BUS with Verilog HDL