JZJisawesome/JZJCoreF
A fast RV32IZifencei soft core implementation with a 2 stage pipeline(ish), written in SystemVerilog! (Mirror of git.jekel.ca/JZJ/jzjcoref)
SystemVerilogMIT
A fast RV32IZifencei soft core implementation with a 2 stage pipeline(ish), written in SystemVerilog! (Mirror of git.jekel.ca/JZJ/jzjcoref)
SystemVerilogMIT