Janeann

Accelerating-CNN-with-FPGA

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

AOWS

Code repositoy for "AOWS: Adaptive and optimal network width search with latency constraints", CVPR 2020

baiduxueshu

paper abstract spider

C2D

PyTorch implementation of "Contrast to Divide: self-supervised pre-training for learning with noisy labels"

CNNAF-CNN-Accelerator

CNN-Accelerator based on FPGA developed by verilog HDL.

cs230-code-examples

Code examples in pyTorch and Tensorflow for CS230

darts

Differentiable architecture search for convolutional and recurrent networks

deeplearning-assignment

吴恩达-深度学习-课后作业-答案与总结

DNN-Chip-Predictor

[ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architectures

vision

Datasets, Transforms and Models specific to Computer Vision

Janeann/cs230-code-examples

Code examples in pyTorch and Tensorflow for CS230

Janeann/darts

Differentiable architecture search for convolutional and recurrent networks

Janeann/vision

Datasets, Transforms and Models specific to Computer Vision

Janeann/Accelerating-CNN-with-FPGA

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

Janeann/AOWS

Code repositoy for "AOWS: Adaptive and optimal network width search with latency constraints", CVPR 2020

Janeann/baiduxueshu

paper abstract spider

Janeann/C2D

PyTorch implementation of "Contrast to Divide: self-supervised pre-training for learning with noisy labels"

Janeann/CNNAF-CNN-Accelerator

CNN-Accelerator based on FPGA developed by verilog HDL.

Janeann/deeplearning-assignment

吴恩达-深度学习-课后作业-答案与总结

Janeann/DNN-Chip-Predictor

[ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architectures

Janeann/Double-Win-Quant

[ICML 2021] "Double-Win Quant: Aggressively Winning Robustness of Quantized DeepNeural Networks via Random Precision Training and Inference" by Yonggan Fu, Qixuan Yu, Meng Li, Vikas Chandra, Yingyan Lin

Janeann/eyeriss_v1

Janeann/HardCoReNAS

Janeann/ICAIS_ML.Pytorch

Janeann/mnist_fpga

using xilinx xc6slx45 to implement mnist net

Janeann/mobile-vision

Mobile vision models and code

Janeann/noisystudent_pytorch

Janeann/Paddle-Lite

Multi-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎）

Janeann/PaddleDetection

Object detection and instance segmentation toolkit based on PaddlePaddle.

Janeann/PC-DARTS

PC-DARTS:Partial Channel Connections for Memory-Efficient Differentiable Architecture Search

Janeann/pool_row_input

CNN_FPGA_acclerator

Janeann/proxylessnas

[ICLR 2019] ProxylessNAS: Direct Neural Architecture Search on Target Task and Hardware

Janeann/PYNQ_softmax

achieve softmax in PYNQ with heterogeneous computing.

Janeann/pytorch_resnet_cifar10

Proper implementation of ResNet-s for CIFAR10/100 in pytorch that matches description of the original paper.

Janeann/self-training-pytorch

Semi-supervised models based on deep neural networks implemented in PyTorch.

Janeann/SIGMA

RTL implementation of Flex-DPE.

Janeann/Single-Path-One-Shot-NAS-MXNet

Single Path One-Shot NAS MXNet implementation with full training and searching pipeline. Support both Block and Channel Selection. Searched models better than the original paper are provided.

Janeann/test

仓库jjj

Janeann/tinyml

Janeann/Verilog-FixedPoint

Verilog fixed-point lib: custom bit width, arithmetic, converting to float, with single cycle & pipeline version.