| A | B | C | Fexpected | Fsim |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 0 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 1 | 1 |
| 1 | 1 | 0 | 0 | 0 |
| 1 | 1 | 1 | 1 | 1 |
The waveform output of the simulated circuit matches the expected result from the truth table of AB'+BC. The result is demonstrated in the truth table comparison of the expected and simulated result.
Documentation: None.