A 16-bit CPU implementation based on the mips Instruction Set Architecture
This is a simple implementation of a MIPS CPU which was done and submitted as a course project to test student's understanding about microproccessor architecture.
This CPU is designed to perform basic arithmetic nad logical operations.
- AND
- OR
- XOR
- NOR
- ADD
- SUB
- Slt (Set less than)
It also is able to perform immediate instructions in addition to jump and branch operations.