JunningWu
高级工程师(Senior Engineer) 中科院自动化研究所( Institute of Automation, Chinese Academy of Sciences)
CASIABeijing,P.R.C
Pinned Repositories
AIChip
Aiming at an AI Chip based on RISC-V and NVDLA.
CaffeOnACL
Using ARM Compute Library (NEON+GPU) to speed up caffe; Providing utilities to debug, profile and tune application performance
haawking-dsc28027-board
haawking-dsc28034-board
HaawkingFoC
hw
RTL, Cmodel, and testbench for NVDLA
Learning-NVDLA-Notes
NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:junning.wu@ia.ac.cn
OpenCube
The Multi-objective Design Space Exploration of Multiprocessor SOC Architectures for Embedded Multimedia Applications (MULTICUBE, January 2008 to June 2010) project aims at increasing the competitiveness of European industries by optimizing the design of embedded computing systems while reducing design time and costs. The project defined an automatic multi-objective DSE framework to be used at design-time to find the best power/performance trade-offs while meeting system-level constraints and speeding up the exploration process. A set of heuristic optimization algorithms have been defined to reduce the exploration time, while a set of response surface modeling techniques have been defined to further speed up the process.
preesm
riscv-dsp
RISC-V DSP, An Amzaing Product
JunningWu's Repositories
JunningWu/Learning-NVDLA-Notes
NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:junning.wu@ia.ac.cn
JunningWu/AIChip
Aiming at an AI Chip based on RISC-V and NVDLA.
JunningWu/riscv-dsp
RISC-V DSP, An Amzaing Product
JunningWu/HaawkingFoC
JunningWu/hw
RTL, Cmodel, and testbench for NVDLA
JunningWu/OpenCube
The Multi-objective Design Space Exploration of Multiprocessor SOC Architectures for Embedded Multimedia Applications (MULTICUBE, January 2008 to June 2010) project aims at increasing the competitiveness of European industries by optimizing the design of embedded computing systems while reducing design time and costs. The project defined an automatic multi-objective DSE framework to be used at design-time to find the best power/performance trade-offs while meeting system-level constraints and speeding up the exploration process. A set of heuristic optimization algorithms have been defined to reduce the exploration time, while a set of response surface modeling techniques have been defined to further speed up the process.
JunningWu/haawking-dsc28027-board
JunningWu/haawking-dsc28034-board
JunningWu/haawking-tools
Some Usefull tools for Haawking DSCs
JunningWu/CaffeOnACL
Using ARM Compute Library (NEON+GPU) to speed up caffe; Providing utilities to debug, profile and tune application performance
JunningWu/gslcl
Getting Started with LLVM Core Libraries (中文版),翻译:潘立丰
JunningWu/junningwu.github.io
JunningWu/riscv-isa-sim
Spike, a RISC-V ISA Simulator
JunningWu/serial-flash-kernel
JunningWu/preesm
JunningWu/chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
JunningWu/haawking-devices
JunningWu/haawking-templates
JunningWu/haawkingX
BoarderCrosser
JunningWu/llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
JunningWu/lowrisc-chip
The root repo for lowRISC project and FPGA demos.
JunningWu/platformio-docs
PlatformIO Documentation
JunningWu/wutiantian.github.io
:girl: 吴甜甜的个人博客wutiantian.github.io