Jzone315

Jzone315's Stars

• PKUZHOU/NeoMem-MICRO-2024

  The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering

  20

• Xilinx/RecoNIC

  RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.

  Language:SystemVerilog9623

• Asabeneh/30-Days-Of-Python

  30 days of Python programming challenge is a step-by-step guide to learn the Python programming language in 30 days. This challenge may take more than100 days, follow your own pace. These videos may help too: https://www.youtube.com/channel/UC7PNRuno1rzYPb1xLa4yktw

  Language:Python41.7k8k

• MJoergen/Avalon

  Utilities for Avalon Memory Map

  Language:VHDL8

• FDU-ME-ARC/NVMeCHA

  Language:VHDL122

• cornell-zhang/heterocl

  HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing

  Language:Python32292

• lizongying/my-tv

  我的电视 电视直播软件，安装即可使用

  Language:C29.8k3.3k

• baidu/dperf

  dperf is a 100Gbps network load tester.

  Language:C4.9k509

• bfsk/PCAP-file-parser-for-Avalon-ST-interface

  Language:VHDL1

• acceltcp/AccelTCP

  A user-level TCP/IP stack with NIC offload of stateful TCP operations

  Language:C6714

• anzhihe/Free-Web-Books

  Learn books from TCP/IP | HTTP(s) | HTML、CSS、JS、JQuery | Vue | PHP | Web | Web Server

  Language:JavaScript918343

• corundum/ethernet-switch

  Ethernet switch implementation written in Verilog

  Language:Python399

• enjoy-digital/litex

  Build your hardware, easily!

  Language:C2.9k557

• developfpga/teng_phy_xilinx

  extreme low latency mac+phy for xilinx gth

  Language:Verilog21

• Xilinx-CNS/onload

  OpenOnload high performance user-level network stack

  Language:C56390

• pmalagon/wupper

  Mirror of the Wupper (PCIe DMA core) on https://gitlab.nikhef.nl/franss/wupper

  Language:VHDL1

• jbl19860422/pci_logic

  Language:VHDL41

• cisco/exanic-software

  ExaNIC drivers, utilities and development libraries

  Language:C13882

• MengRao/pollnet

  A collection of non-blocking(polling) network libs for Linux, also support solarflare APIs(Tcpdirect/Efvi)

  Language:C++20987

• intel/fpga-partial-reconfig

  Tutorials, scripts and reference designs for the Intel FPGA partial reconfiguration (PR) design flow

  Language:SystemVerilog8640

• open-fpga-nvm/open-nvm-source

  Open-NVM Software Source Code

  Language:Verilog106

• triSYCL/triSYCL

  Generic system-wide modern C++ for heterogeneous platforms with SYCL from Khronos Group

  Language:C++43898

• WilsonChen003/HDLGen

  HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded functions, with ZERO learning-curve

  Language:Verilog8523

• ZipCPU/wb2axip

  Bus bridges and other odds and ends

  Language:Verilog48098

• Xilinx/AlveoLink

  This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multiple Alveo cards.

  Language:Verilog195

• ultraembedded/core_sdram_axi4

  SDRAM controller with AXI4 interface

  Language:C++7629

• axbryd/FlowBlaze

  FlowBlaze: Stateful Packet Processing in Hardware

  Language:VHDL6613

• afkhawaja/amorphos

  AmorphOS open source FPGA operating system project

  Language:C++62

• RC4ML/FpgaNIC

  FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs

  Language:TeX11617

• axbryd/hXDP-Artifacts

  Language:Python577