Pinned Repositories
Analog-Design-of-1.9-GHz-PLL-system
This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.
asap7
ASIC-Design
Digital signal processing that can minimize the bit-rate without degradation in the signal quality is highly desirable. In telecommunication, speech compression is one of the main application where low bit rate is desired to reduce the bandwidth requirement. As per Recommendation G.711: Pulse Code Modulation (PCM) of voice frequencies by International Telecommunication Union (ITU), the standard PCM signal bit rate is 64kbits/s. This project was developed based on, Recommendation G.726: 40, 32, 24, 16kbit/s Adaptive Differential Pulse Code Modulation (ADPCM) was used to achieve low bit rates for different application requirements. The design was targeted for processing 8 independent channels in a 125 microsecond frame. In order to achieve considerable reduction in system size and instantaneous power, the FMULT/ACCUM module in ADPCM algorithm was implemented as bit serial arithmetic operations with independent floating point multiplier and accumulator. A hierarchical bottom-up design and verification approach was followed resulting in gate level synthesis of MCAC, targeted to TSMC 0.18µm Process technology.
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Kimichugn2's Repositories
Kimichugn2/Analog-Design-of-1.9-GHz-PLL-system
This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.
Kimichugn2/asap7
Kimichugn2/ASIC-Design
Digital signal processing that can minimize the bit-rate without degradation in the signal quality is highly desirable. In telecommunication, speech compression is one of the main application where low bit rate is desired to reduce the bandwidth requirement. As per Recommendation G.711: Pulse Code Modulation (PCM) of voice frequencies by International Telecommunication Union (ITU), the standard PCM signal bit rate is 64kbits/s. This project was developed based on, Recommendation G.726: 40, 32, 24, 16kbit/s Adaptive Differential Pulse Code Modulation (ADPCM) was used to achieve low bit rates for different application requirements. The design was targeted for processing 8 independent channels in a 125 microsecond frame. In order to achieve considerable reduction in system size and instantaneous power, the FMULT/ACCUM module in ADPCM algorithm was implemented as bit serial arithmetic operations with independent floating point multiplier and accumulator. A hierarchical bottom-up design and verification approach was followed resulting in gate level synthesis of MCAC, targeted to TSMC 0.18µm Process technology.
Kimichugn2/shop