LiTtle633

LiTtle633's Stars

• alexforencich/verilog-ethernet

  Verilog Ethernet components for FPGA implementation

  Language:Verilog2.2k688

• m-labs/tdc-core

  A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs

  Language:Verilog5627

• shinde-shantanu/FPGA_TDC

  Time to Digital Converter on an FPGA

  Language:VHDL132

• jobisoft/jTDC

  FPGA based 30ps RMS TDCs

  Language:VHDL7626

• gavin-lewis/TDC_FPGA

  TDC Hybrid Counter FPGA

  Language:VHDL62

• LiTtle633/DeepLearningTutorials

  Deep Learning Tutorial notes and code. See the wiki for more info.

  1

• lisa-lab/DeepLearningTutorials

  Deep Learning Tutorial notes and code. See the wiki for more info.

  Language:Python4.1k2.1k

• LiTtle633/MachineLearning

  Basic Machine Learning and Deep Learning

  1

• iml-wg/HEPML-LivingReview

  Living Review of Machine Learning for Particle Physics

  Language:TeX349106

• acheeseman/TRIUMF-MWDOptimization

  C code to optimize the parameters of the Moving Window Deconvolution method for energy evaluation

  Language:C1

• robintibor/braindevel

  For my current research.

  Language:Jupyter Notebook3814

• weilongzheng/braindecode

  A deep learning toolbox to decode raw time-domain EEG.

  Language:Python41

• DeepBCI/Deep-BCI

  An open software package to develop BCI based brain and cognitive computing technology for recognizing user's intention using deep learning

  Language:C379179