Lombiq/Hastlayer-Timing-Tester

Utility to determine the timings of various operations to be used in the device drivers.

Hastlayer Timing Tester

About

Hastlayer Timing Tester is for automatically determining how certain VHDL operators will behave on an FPGA with regards to timing. This is necessary for Hastlayer to work correctly.

Documentation

• Introduction
• Usage
• Miscellaneous information

Contributing and support

Bug reports, feature requests, comments, questions, code contributions and love letters are warmly welcome. You can send them to us via GitHub issues and pull requests. Please adhere to our open-source guidelines while doing so.

This project is developed by Lombiq Technologies. Commercial-grade support is available through Lombiq.