Pinned Repositories
Low-Power-and-Area-Efficient-Carry-Select-Adder-CSLA-
Verilog implementation modified carry select adder
Merinyeldho
Config files for my GitHub profile.
Multilingo-Translator
Translator
SAP1-computer-verilog
Verilog implementation of SAP-1 computer architecture
Smart_shelf_backend
smartshelf-frontend
SmartShelf_Arduino
synopsis_training_programme
Merinyeldho's Repositories
Merinyeldho/Low-Power-and-Area-Efficient-Carry-Select-Adder-CSLA-
Verilog implementation modified carry select adder
Merinyeldho/SAP1-computer-verilog
Verilog implementation of SAP-1 computer architecture
Merinyeldho/Merinyeldho
Config files for my GitHub profile.
Merinyeldho/Multilingo-Translator
Translator
Merinyeldho/Smart_shelf_backend
Merinyeldho/smartshelf-frontend
Merinyeldho/SmartShelf_Arduino
Merinyeldho/synopsis_training_programme