MineFujiko

MineFujiko's Stars

• MikePopoloski/slang

  SystemVerilog compiler and language services

  Language:C++611135

• ZipCPU/zipcpu

  A small, light weight, RISC CPU soft core

  Language:Verilog1.3k157

• chipsalliance/rocket-chip

  Rocket Chip Generator

  Language:Scala3.2k1.1k

• riscv-mcu/hbird-sdk

  OpenSource HummingBird RISC-V Software Development Kit

  Language:C14248

• sifive/freedom-e-sdk

  Open Source Software for Developing on the Freedom E Platform - Deprecated

  Language:C582208

• Nitcloud/Digital-IDE

  在vscode上的数字设计开发插件

  Language:Verilog32520

• yianwillis/vimcdoc

  Vim 中文文档计划

  Language:C2k266

• aipyer/vimscript

  Language:Vim Script1

• freecores/jtag

  JTAG Test Access Port (TAP)

  Language:Verilog3012

• windingwind/zotero-better-notes

  Everything about note management. All in Zotero.

  Language:TypeScript5.5k188

• ZipCPU/wb2axip

  Bus bridges and other odds and ends

  Language:Verilog484101

• bogdanvuk/pygears

  HW Design: A Functional Approach

  Language:Python14713

• zotero/zotero

  Zotero is a free, easy-to-use tool to help you collect, organize, annotate, cite, and share your research sources.

  Language:JavaScript10.3k758

• airin711/Verilog-caches

  Various caches written in Verilog-HDL

  Language:Verilog11341

• huginn/huginn

  Create agents that monitor and act on your behalf. Your agents are standing by!

  Language:Ruby43.4k3.8k

• Linusp/org-agenda-example

  Language:Emacs Lisp163

• TYOD-SOC/RISCV-Accelerator

  Language:C358

• plctlab/PLCT-Open-Reports

  PLCT实验室的公开演讲，或者决定公开的组内报告

  1k154

• BVLC/caffe

  Caffe: a fast open framework for deep learning.

  Language:C++34.1k18.7k

• ikwzm/MT32_Rand_Gen

  Mersenne Twister Pseudo Random Number Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).

  Language:VHDL93

• exponential-growth/BookList

  经典书籍📚，设计**，数学之美，浪潮之巅。

  9739

• masasam/emacs-easy-hugo

  Emacs major mode for managing hugo

  Language:Emacs Lisp36226

• microdynamics-cpu/tree-core-ide

  :deciduous_tree: The next generation integrated development environment for processor design and verification. It has multi-hardware language support, open source IP management and easy-to-use rtl simulation toolset.

  Language:JavaScript9915

• dillonzq/LoveIt

  ❤️A clean, elegant but advanced blog theme for Hugo 一个简洁、优雅且高效的 Hugo 主题

  Language:JavaScript3.4k1.1k

• luizdepra/hugo-coder

  A minimalist blog theme for hugo.

  Language:HTML2.7k1.1k

• nndl/nndl.github.io

  《神经网络与深度学习》 邱锡鹏著 Neural Network and Deep Learning

  Language:HTML17.4k3.6k

• google/fonts

  Font files available from Google Fonts, and a public issue tracker for all things Google Fonts

  Language:HTML18.2k2.6k

• dense-analysis/ale

  Check syntax in Vim/Neovim asynchronously and fix files, with Language Server Protocol (LSP) support

  Language:Vim Script13.6k1.4k

• TerosTechnology/vscode-terosHDL

  VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

  Language:VHDL56045

• ycm-core/YouCompleteMe

  A code-completion engine for Vim

  Language:Python25.5k2.8k