/MIPS-CPU

Project of hardware course group in Tongji University

Primary LanguageVerilog

MIPS-CPU

Project of hardware course group in Tongji University.
Based on FPGA(DIGILENT Nexys4 DDR) by Verilog.

  • MIPS CPU-31
  • MIPS CPU-54
  • MP3 based on MIPS CPU-54
  • Pipeline CPU
  • 3-level Storage with MIPS CPU