/MZNM-Processor

This is a Computer Architecture Course Project, for making 5-stages pipelined processor with Verilog

Primary LanguageVerilogMIT LicenseMIT

MZNM-Processor

Description

This is a RISC-like implementation for a 5-stages pipelined processor implemented with Verilog which follows Harvard architecture with 2 separated memories one for the data and the other for the instructions with full forwarding to solve data hazards, a hazard detection unit to solve control hazards, and a compiler script with Python to compile assembly instructions into machine code instructions.

Build With

Getting Started

This is an list of needed steps to set up your project locally, to get a local copy up and running follow these steps.

Installation

  1. Clone the repository
    $ git clone https://github.com/MoazHassan2022/MZNM-Processor.git
  2. Navigate to repository directory
    $ cd MZNM-Processor
  3. Install ModelSim

Running

  1. Run ModelSim
  2. Running simulation in ModelSim terminal, this will compile and run assembly instructions written in ./instructions.asm
    $ do simulation.do

Project Structure

MZNM-Processor
├── design
    ├── processorDesign.drawio
    ├── processorDesign.pdf
    ├── processorDesign.jpg
├── requirements
    ├── 1.jpg
    ├── 2.jpg
    ├── 3.jpg
    ├── 4.jpg
    ├── 5.jpg
    ├── 6.jpg
    ├── 7.jpg
├── ALU.v
├── controller.v
├── controllerTB.v
├── controlUnit.v
├── dataMemory.txt
├── dataMemory.v
├── DEBuffer.v
├── defines.v
├── EMBuffer.v
├── FDBuffer.v
├── forwarding-unit.v
├── hazardDetectionUnit.v
├── inst.py
├── instructionMemory.txt
├── instructionMemory.v
├── instructions.asm
├── pc.v
├── processor.v
├── regfile.v
├── simulation.do
├── stackPointer.v
├── writeBack.v
├── README.md
  

These are the requirements for the processor

  • Page 1

    first page in the requirements

  • Page 2

    second page in the requirements

  • Page 3

    third page in the requirements

  • Page 4

    fourth page in the requirements

  • Page 5

    fifth page in the requirements

  • Page 6

    sixth page in the requirements

  • Page 7

    seventh page in the requirements

Processor Design

Here is our design in an image

our processor design


You can also view the design details with drawio website in ./design/processorDesign.drawio


You can also view the design details in ./design/processorDesign.pdf