-The project aimed to design a CISC processor with a given MIN Architecture (Custom Architecture) with a given set of instructions (ADD, SUB, BRANCH, LOAD & STORE) with three addressing modes: Register direct, Memory to Register, and Memory to Memory.
-Hardware Flowchart method was used. The modules designed were Instruction Decoder, Execution Unit, Control Word Store, and Next State Logic.
-Write a testbench program code to test the execution of the processor using Verilog Code.
-The software used for the project was Questa-Sim.