/MIPS-Processor

Implementation of a processor with the MIPS architecture on the HDL Verilog.

Primary LanguageVerilogGNU General Public License v3.0GPL-3.0

MIPS-Processor

Implementation of a processor with the MIPS architecture and the HDL Verilog.

Modules:

  • ALU.
  • ALU Control.
  • Register File.
  • Sign extend.
  • Shift left 2 (2 from 2).
  • Instruction Memory.
  • Program Counter.
  • Main Control Unit.
  • Data Memory.
  • MUX (4 from 5).
  • Adder(2 from 2).
Participants:
  • Gonzalo Alfaro Caso.