Implementation of a processor with the MIPS architecture and the HDL Verilog.
- ALU.
- ALU Control.
- Register File.
- Sign extend.
- Shift left 2 (2 from 2).
- Instruction Memory.
- Program Counter.
- Main Control Unit.
- Data Memory.
- MUX (4 from 5).
- Adder(2 from 2).
- Gonzalo Alfaro Caso.