MustafaTarek77/5-stages-piplined-processor
5-stage pipelined Harvard processor adhering to a RISC-like ISA specification. Key featuresinclude eight general-purpose registers, a program counter (PC), and a stack pointer (SP). The processor efficientlymanages interrupts, saving the PC on the stack and resuming execution with interrupt return instructions.
VHDL
Stargazers
No one’s star this repository yet.