Pinned Repositories
abft-rescheck
A repository for the code of "A comparison of several fault-tolerance methods for error detection and correction of floating-point errors in matrix multiplication" by Valentin Le Fèvre, Thomas Hérault, Julien Langou and Yves Robert
Algorithmic-SAR-ADC-simulation-files
HSPICE and MATLAB simulation files of a tracking SAR ADC
ArrayProcessor_SystemC
Compressive_Sensing_C_and_MATLAB
C and MATLAB implementation of CS recovery algorithm, i.e. Orthogonal Matching Pursuit, Approximate Message Passing, Iterative Hard Thresholding Algorithms
conv-hls-overclocking
CUDA-Stereo-Vision-Code
This is CUDA implementation of a well-known stereo vision algorithm
Hexagon_DSP_programming
Repository to learn Hexagon DSP and HVX Programming
LABFT
A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs, with error detection capabilities.
LowVoltageDNNonFPGA
Neural Network with ABFT for fault tolerant and low power applications
TPU-Tensor-Processing-Unit
IC implementation of TPU
NeuroFan's Repositories
NeuroFan/Compressive_Sensing_C_and_MATLAB
C and MATLAB implementation of CS recovery algorithm, i.e. Orthogonal Matching Pursuit, Approximate Message Passing, Iterative Hard Thresholding Algorithms
NeuroFan/Algorithmic-SAR-ADC-simulation-files
HSPICE and MATLAB simulation files of a tracking SAR ADC
NeuroFan/CUDA-Stereo-Vision-Code
This is CUDA implementation of a well-known stereo vision algorithm
NeuroFan/Hexagon_DSP_programming
Repository to learn Hexagon DSP and HVX Programming
NeuroFan/LABFT
A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs, with error detection capabilities.
NeuroFan/LowVoltageDNNonFPGA
Neural Network with ABFT for fault tolerant and low power applications
NeuroFan/TPU-Tensor-Processing-Unit
IC implementation of TPU
NeuroFan/abft-rescheck
A repository for the code of "A comparison of several fault-tolerance methods for error detection and correction of floating-point errors in matrix multiplication" by Valentin Le Fèvre, Thomas Hérault, Julien Langou and Yves Robert
NeuroFan/ArrayProcessor_SystemC
NeuroFan/conv-hls-overclocking
NeuroFan/deep_motion_mag
Tensorflow implementation of Learning-based Video Motion Magnification
NeuroFan/FFT_Error_Detection_Energy_Saving
Algorithmic error detection within Fourier context to enable low power-energy solutions based on undervolting
NeuroFan/hls4ml
Machine learning in FPGAs using HLS
NeuroFan/HotSpot
HotSpot v7.0 is an accurate and fast thermal model suitable for use in architectural studies.
NeuroFan/HotSpotMap
A Python-based temperature (thermal) maps generation tool for HotSpot-6.0 (http://lava.cs.virginia.edu/HotSpot/)
NeuroFan/Image-processing-based-mechanical-fault-detection
NeuroFan/LDPC
Simple Matlab function implementing the LDPC soft decoding algorithm, with the log sum product method
NeuroFan/lenet5-accelerator
FPGA and GPU acceleration of LeNet5
NeuroFan/llm-course
Course to get into Large Language Models (LLMs) with roadmaps and Colab notebooks.
NeuroFan/matmult
A floating-point matrix multiplication implemented in hardware
NeuroFan/matrix_mult_with_ABFT
NeuroFan/My-Course-Projects
These are course projects, I've done during my studies. Please do not ask for help and try to understand the method.
NeuroFan/nn_topology_to_hls-
NeuroFan/os-tutorial
How to create an OS from scratch
NeuroFan/SDSoC-Tutorials
SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials
NeuroFan/SDSoC_Examples
NeuroFan/segan
Speech Enhancement Generative Adversarial Network in TensorFlow
NeuroFan/SystolicArray
SPICE and Behavioral simulation of systolic array equipped with error detection ABFT
NeuroFan/SystolicArray_FPGA
Systolic matrix multiplication kernel implemented on Xilinx PYNQ FPGA board
NeuroFan/Thesis