This project is a computer architecture simulation in Java that emulates the behavior of a simple processor. The simulation includes components such as a processor, datapath, register file, and a parser. The primary goal of this project is to provide a hands-on experience with computer architecture concepts and enable users to understand the fundamental operations of a basic processor.
-
Processor: The central processing unit (CPU) of the simulated architecture. It executes instructions and manages the flow of data between various components.
-
Datapath: Represents the dataflow within the processor. It includes various functional units responsible for performing arithmetic and logic operations.
-
Register File: A set of registers that store intermediate data during the execution of instructions. The register file is an integral part of the processor's architecture.
-
Parser: Parses instructions to convert them into a format that the processor can understand and execute. It interprets the assembly-like language used in the simulation.