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a2i
The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers
Language:VHDL40 7 12
a2o
The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation stations, completion buffer) and a store queue. It is now being updated for compliancy and integration into open projects.
Language:Verilog44 8 177
a2p
Language:Verilog7 3 05
a2p-mpw
0 5 00
ac922interposer
AC922 Interposer Board for DC-SCM BMC - mirrored from OPF git - Maintained by the LibreBMC SIG
Language:XSLT3 7 02
lpcperipheral
LPC Peripheral Repository mirrored to OPF Git https://git.openpower.foundation/librebmc/lpcperipheral
Language:Python3 8 05
openpower
OpenPOWER Foundation General Information & Repository Listing
18 4 03
power-fv
POWER-FV - Mirrored from OPF Git
Language:Python1 3 02
Searchboat
OpenPower Verification
Language:Verilog5 6 02
toy-sram
High-specific-bandwidth memory design
Language:Verilog4 6 12

OpenPOWERFoundation/a2o
The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation stations, completion buffer) and a store queue. It is now being updated for compliancy and integration into open projects.
Language:Verilog44 8 177
OpenPOWERFoundation/a2i
The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers
Language:VHDL40 7 12
OpenPOWERFoundation/openpower
OpenPOWER Foundation General Information & Repository Listing
18 4 03
OpenPOWERFoundation/a2p
Language:Verilog7 3 05
OpenPOWERFoundation/Searchboat
OpenPower Verification
Language:Verilog5 6 02
OpenPOWERFoundation/toy-sram
High-specific-bandwidth memory design
Language:Verilog4 6 12
OpenPOWERFoundation/ac922interposer
AC922 Interposer Board for DC-SCM BMC - mirrored from OPF git - Maintained by the LibreBMC SIG
Language:XSLT3 7 02
OpenPOWERFoundation/lpcperipheral
LPC Peripheral Repository mirrored to OPF Git https://git.openpower.foundation/librebmc/lpcperipheral
Language:Python3 8 05
OpenPOWERFoundation/power-fv
POWER-FV - Mirrored from OPF Git
Language:Python1 3 02
OpenPOWERFoundation/a2p-mpw
0 5 00
OpenPOWERFoundation/toy-sram-mpw7
eFabless MPW-7
Language:Verilog0 5 01
OpenPOWERFoundation/Power-Architecture-Platform-Reference-LoPAPR
5 0