Pinned Repositories
CompArchHW
Homework sources of Computer Architecture 2019
FreeRTOS-Briey
FreeRTOS port for VexRiscv Briey SoC
linux-taskisol
Linux kernel source tree adapted with task isolation patchset
MicroControllerHW
YouTubeDownloader
A python-based GUI tool for downloading medias from YouTube
OscarShiang's Repositories
OscarShiang/FreeRTOS-Briey
FreeRTOS port for VexRiscv Briey SoC
OscarShiang/YouTubeDownloader
A python-based GUI tool for downloading medias from YouTube
OscarShiang/linux-taskisol
Linux kernel source tree adapted with task isolation patchset
OscarShiang/MicroControllerHW
OscarShiang/amacc
Small C Compiler generating ELF executable Arm architecture, supporting JIT execution
OscarShiang/ARMMultiTasking
Multi-tasking kernel for Arm/Thumb/AArch64 targets.
OscarShiang/bookinfo
A simple DBMS for monitoring books
OscarShiang/CompilerHW
OscarShiang/ComputerArchHW
Homework sources of Computer Architecture 2021
OscarShiang/dict
Ternary Search Tree + Bloom filter
OscarShiang/dotfiles
OscarShiang/fprime-tutorial-math-component
The F´ MathComponent Tutorial
OscarShiang/FreeRTOS
'Classic' FreeRTOS distribution. Started as Git clone of FreeRTOS SourceForge SVN repo. Submodules the kernel.
OscarShiang/hideproc
A kernel module that can hide processes
OscarShiang/line-simple-beacon
OscarShiang/meichu-backend
OscarShiang/meichu-stack
Project Stack of Meichu Hackathon 2021
OscarShiang/memecraft
Creating memes with linebot service
OscarShiang/mutt-office365
A mutt configuration file ready for Office 365
OscarShiang/NetworkLab
Lab codes of Computer Communication Networks
OscarShiang/OperSysHW
OscarShiang/raspberry-pi-os
Learning operating system development using Linux kernel and Raspberry Pi
OscarShiang/raspbootin
Simple boot-over-serial bootloader for the Raspberry Pi
OscarShiang/raspi3-tutorial
Bare metal Raspberry Pi 3 tutorials
OscarShiang/sehttpd
A small and efficient web server with 1K lines of C code
OscarShiang/sportlight
OscarShiang/sportlight-backend
OscarShiang/srv32
Simple 3-stage pipeline RISC-V processor
OscarShiang/tarfs
OscarShiang/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation