/Logic-Design-Simulator

Primary LanguageC

Logic Design Simulator

A user-friendly logic design simulator to test and design logic circuits written in C++ using CMU graphics library.

Features

  • Design and simulate circuits.

  • Generate truth table for your circuits.

  • Save and restore your circuits.

  • Undo or redo your actions.

  • Copy, cut, and paste circuit components.

  • Rename and delete gates.

Sample Circuits

Circuit #1

circuit

truthtable

Circuit #2

circuit

truthtable