PaulZeroOne
R&D Intern @STMicroelectronics | MS Electronics @ PoliMi | Amateur Astronomer
STMicroelectronicsMilano, IT
Pinned Repositories
AlexaSanitizer
awesome-space
🛰️🚀A list of awesome space-related packages and resources maintained by The Orbital Index
Best-README-Template
An awesome README template to jumpstart your projects!
Capstone-2021
cosmobuddy
FFT_Design
A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
Image_Processing_Using_FPGA
IMC-SRAM-Modeling
MathWorks-Excellence-in-Innovation
Capstone and senior design projects for undergraduate and graduate students to gain practical experience and insight into technology trends and industry directions.
OpenLANE-SKY130-Physical_Design
This repository contains all the information studied and created during the Advanced Physical Design Using OpenLANE / SKY130 workshop. It is primarily foucused on a complete RTL2GDS flow using the open-soucre flow named OpenLANE. PICORV32A RISC-V core design is used for the purpose.
PaulZeroOne's Repositories
PaulZeroOne/OpenLANE-SKY130-Physical_Design
This repository contains all the information studied and created during the Advanced Physical Design Using OpenLANE / SKY130 workshop. It is primarily foucused on a complete RTL2GDS flow using the open-soucre flow named OpenLANE. PICORV32A RISC-V core design is used for the purpose.
PaulZeroOne/AlexaSanitizer
PaulZeroOne/awesome-space
🛰️🚀A list of awesome space-related packages and resources maintained by The Orbital Index
PaulZeroOne/Best-README-Template
An awesome README template to jumpstart your projects!
PaulZeroOne/Capstone-2021
PaulZeroOne/cosmobuddy
PaulZeroOne/FFT_Design
A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
PaulZeroOne/Image_Processing_Using_FPGA
PaulZeroOne/IMC-SRAM-Modeling
PaulZeroOne/MathWorks-Excellence-in-Innovation
Capstone and senior design projects for undergraduate and graduate students to gain practical experience and insight into technology trends and industry directions.
PaulZeroOne/Business_Card_PCB
A personal Business Card designed as a PCB. Supports NFC to share data wirelessly on a tap.
PaulZeroOne/Capsule_Corporation
Designing and producing the next-gen propulsion system for cubesats and smallsats.
PaulZeroOne/DigitalClock24hrs
PaulZeroOne/EnduroSAT
PaulZeroOne/HadesFCS
Complete flight control system designed from scratch. Hardware designed with KiCad.
PaulZeroOne/maximousblk
I'm a design-minded front-end Web Developer focused on building beautiful web interfaces & experiences.
PaulZeroOne/Nanosatellite-OnBoard-Computing-System-
This describes both the Hardware and Software Implementation of a Nanosatellite OBC
PaulZeroOne/OpenSource_Physical_Design
This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK
PaulZeroOne/PaulZeroOne
PaulZeroOne/PaulZeroOne.github.io
PaulZeroOne/Project-Mach-1
This is the code and hardware designs for the high powered rocketry project at the Imperial College Space Society
PaulZeroOne/Radix-IFFT
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
PaulZeroOne/RIS_components
components of RIS simulations
PaulZeroOne/Sky130-RTL-Design-and-Synthesis
PaulZeroOne/Sky130-RTL-Design-Workshop
PaulZeroOne/Space-is-Love
PaulZeroOne/SparkFun-Eagle-Libraries
SparkFun's Public Eagle PCB Footprints
PaulZeroOne/Sun_Timelapse
PaulZeroOne/Verilog-Mini-Projects
Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and Carry Save Adder, Complex Multiplier, Dice Game, FIFO, Fixed Point Adder and Subtractor, Fixed Point Multiplier and Divider, Floating Point IEEE 754 Addition Subtraction, Floating Point IEEE 754 Division, Floating Point IEEE 754 Multiplication, Fraction Multiplier, High Radix Multiplier, I2C and SPI Protocols, LFSR and CFSR, Logarithm Implementation, Mealy and Moore State Machine Implementation of Sequence Detector, Modified Booth Algorithm, Pipelined Multiplier, Restoring and Non Restoring Division, Sequential Multiplier, Shift and Add Binary Multiplier, Traffic Light Controller, Universal_Shift_Register, BCD Adder, Dual Address RAM and Dual Address ROM
PaulZeroOne/Website