PedroAntunes178

Pinned Repositories

4emlinha
Este repositório serve para dar host ao projecto de realização de um jogo em python o 4 (ou +) em linha.
Language:Python0 3 02
AMov
Movement Analysis (with a Bitalino), Developed for a master student who worked at AnimalCare.
Language:Python0 3 00
buildroot
Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.
Language:Makefile00
Calculator_Tutorial
Language:Python0 2 00
iob-soc
RISC-V System on Chip Template Based on the picorv32 Processor
Language:Verilog0 2 00
iob-soc-opencryptolinux
Language:C00
iob-vexriscv
Language:Verilog00
MyCLINT
RISC-V Core Local Interrupt Controller (CLINT) to work as a peripheral primarally in IOb-SoC
Language:C01
uart16550
UART 16550 core
Language:Verilog10

PedroAntunes178's Repositories

PedroAntunes178/uart16550
UART 16550 core
Language:Verilog10
PedroAntunes178/buildroot
Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.
Language:Makefile00
PedroAntunes178/Calculator_Tutorial
Language:Python0 2 00
PedroAntunes178/iob-soc
RISC-V System on Chip Template Based on the picorv32 Processor
Language:Verilog0 2 00
PedroAntunes178/iob-soc-opencryptolinux
Language:C00
PedroAntunes178/iob-vexriscv
Language:Verilog00
PedroAntunes178/MyCLINT
RISC-V Core Local Interrupt Controller (CLINT) to work as a peripheral primarally in IOb-SoC
Language:C01
PedroAntunes178/ethmac
Ethernet MAC 10/100 Mbps
PedroAntunes178/iob-axi
Language:Verilog1 0
PedroAntunes178/iob-cache
Verilog configurable cache
Language:Verilog
PedroAntunes178/iob-clint
Language:C
PedroAntunes178/iob-cva6
IOb-SoC wrapper for the cva6 Linux capable CPU
Language:Verilog
PedroAntunes178/iob-ethmac
Language:Verilog
PedroAntunes178/iob-lib
Language:Verilog
PedroAntunes178/iob-linux
Repository to build Linux OS to work with IOb-SoC-OpenCryptoLinux.
Language:Makefile
PedroAntunes178/iob-picorv32
IOb_SoC version of the Picorv32 RISC-V Verilog IP core
Language:Verilog
PedroAntunes178/iob-plic
Language:C
PedroAntunes178/iob-spi
Language:Verilog
PedroAntunes178/iob-timer
Simple Timer IP Core in Verilog
Language:C++
PedroAntunes178/iob-uart
Language:C
PedroAntunes178/iob-uart16550
Language:Verilog
PedroAntunes178/iob-versat
Coarse Grained Reconfigurable Array
PedroAntunes178/master-thesis
LaTeX - master thesis
Language:TeX
PedroAntunes178/MyNixOS_conf
NixOS configuration files
Language:Nix
PedroAntunes178/nixpkgs
Nix Packages collection
Language:Nix
PedroAntunes178/payload-3.0-demo
PedroAntunes178/PDC_Project_2024
Language:C
PedroAntunes178/riscv-isa-manual
RISC-V Instruction Set Manual
PedroAntunes178/verilog-axi
Verilog AXI components for FPGA implementation
Language:Verilog
PedroAntunes178/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
Language:Assembly