EECS251 Project
Implementation of the RISC-V architecture on a Pynq-Z1 FPGA using Vivado: https://github.com/PhilippeFerreiraDeSousa/eecs251_fa19_riscv_fpga_project/blob/master/spec/project_spec.pdf
Simulation
Use VCS (and dve) or its alternative opensource solution Icarus (and gtkwave)