RAOUMERTC73

Undergrad Telecom Engineer | NED University of Engineering and Technology

Pinned Repositories

-Design-and-Verification-Trainee
SemiRise Training Program: currently working on a remote training focused on Digital logic design, Verilog, System Verilog, Computer Architecture. This training has provided me with hands-on experience in designing and verifying digital circuits using advanced software tool.
Language:Verilog10
Arduino_esp8266_Projects
Language:C++00
Design-Single-Cycle-processor
Language:Verilog00
Quartus_prime_FILE
Language:SystemVerilog00
RAOUMERTC73
Config files for my GitHub profile.
00
verilog_project
Language:Verilog00

RAOUMERTC73/-Design-and-Verification-Trainee
SemiRise Training Program: currently working on a remote training focused on Digital logic design, Verilog, System Verilog, Computer Architecture. This training has provided me with hands-on experience in designing and verifying digital circuits using advanced software tool.
Language:Verilog10
RAOUMERTC73/Arduino_esp8266_Projects
Language:C++00
RAOUMERTC73/Design-Single-Cycle-processor
Language:Verilog00
RAOUMERTC73/Quartus_prime_FILE
Language:SystemVerilog00
RAOUMERTC73/RAOUMERTC73
Config files for my GitHub profile.
00
RAOUMERTC73/verilog_project
Language:Verilog00