RTimothyEdwards

Open Circuit DesignPoolesville, Maryland

Pinned Repositories

capiche
Parasitic capacitance analysis of foundry metal stackups
Language:Python10 5 32
caravel_openframe_project
Example digital project for the Efabless Caravel "openframe" harness
Language:Verilog8 1 1512
irsim
IRSIM switch-level simulator for digital circuits
Language:C31 5 66
magic
Magic VLSI Layout Tool
Language:C504 26 226106
netgen
Netgen complete LVS tool for comparing SPICE or verilog netlists
Language:C112 10 6225
open_pdks
PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open processes.
Language:Python295 20 22086
qflow
Qflow full end-to-end digital synthesis flow for ASIC designs
Language:C196 15 4736
qrouter
Qrouter detail router for digital ASIC designs
Language:C57 8 817
tutorial_layout
Repository of files associated with the webinar on analog layout using magic and klayout with Matt Venn.
Language:Shell9 1 03
XCircuit
XCircuit circuit drawing and schematic capture tool
Language:C111 12 1724

RTimothyEdwards's Repositories

RTimothyEdwards/magic
Magic VLSI Layout Tool
Language:C504 26 226106
RTimothyEdwards/open_pdks
PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open processes.
Language:Python295 20 22086
RTimothyEdwards/qflow
Qflow full end-to-end digital synthesis flow for ASIC designs
Language:C196 15 4736
RTimothyEdwards/netgen
Netgen complete LVS tool for comparing SPICE or verilog netlists
Language:C112 10 6225
RTimothyEdwards/XCircuit
XCircuit circuit drawing and schematic capture tool
Language:C111 12 1724
RTimothyEdwards/qrouter
Qrouter detail router for digital ASIC designs
Language:C57 8 817
RTimothyEdwards/irsim
IRSIM switch-level simulator for digital circuits
Language:C31 5 66
RTimothyEdwards/capiche
Parasitic capacitance analysis of foundry metal stackups
Language:Python10 5 32
RTimothyEdwards/caravel_openframe_project
Example digital project for the Efabless Caravel "openframe" harness
Language:Verilog8 1 1512
RTimothyEdwards/sky130_ef_ip__opamp
Instrumentation amplifier (analog IP example)
Language:Verilog7 2 04
RTimothyEdwards/chipalooza_projects_1
Chipalooza challenge first test chip of projects
Language:C5 2 03
RTimothyEdwards/fracn_dll
Alternative version of the Caravel digital locked loop (DLL) with a fractional feedback divider
Language:Verilog2 1 0
RTimothyEdwards/sky130_ef_ip__cdac3v_12bit
12-bit capacitive DAC
Language:Tcl2 2 02
RTimothyEdwards/sky130_ef_ip__rdac3v_8bit
8-bit resistor ladder DAC with 3.3V output range
Language:MATLAB2 2 21
RTimothyEdwards/sky130_ef_ip__samplehold
Analog 3.3V sample and hold circuit, with buffered output
Language:Tcl2 1 02
RTimothyEdwards/sky130_ef_ip__xtal_osc_32k
Low power, low speed (32.768kHz) crystal oscillator circuit for sky130 technology
Language:Shell2 1 01
RTimothyEdwards/chipalooza_projects_2
2nd test chip of Chipalooza analog IP
Language:Makefile11
RTimothyEdwards/contact_programmed_ROM_cells
Set of layouts for contact-programmed ROM values of various bit widths.
1 1 0
RTimothyEdwards/sky130_ef_ip__adc3v_12bit
12-bit ADC using other analog component repositories for the sample & hold, DAC, and comparator.
Language:Shell12
RTimothyEdwards/sky130_ef_ip__biasgen
Current bias generator circuit for distributing bias currents to analog circuits.
Language:Tcl1 2 01
RTimothyEdwards/sky130_ef_ip__ccomp3v
Continuous analog comparator, 1mV resolution
Language:Tcl1 1 02
RTimothyEdwards/sky130_ef_ip__rc_osc_16M
16MHz (nominal) current-starved ring oscillator
Language:Shell1 1 01
RTimothyEdwards/sky130_ef_ip__xtal_osc_16M
High speed (16MHz) crystal oscillator in sky130 technology
Language:Shell1 1 01
RTimothyEdwards/Smoothieware
Modular, opensource, high performance G-code interpreter and CNC controller written in Object-Oriented C++
Language:C++1 2 02
RTimothyEdwards/tt-fpga-hdl-demo
TinyTapeout demo
Language:TL-Verilog1 0 0
RTimothyEdwards/sky130_ef_ip__analog_switches
Set of analog switch circuits for general-purpose use
Language:Shell0 1 02
RTimothyEdwards/FOSSi_workshop
Files related to FOSSi Latch-Up 2024 workshop, Sunday, April 21, 2024.
Language:Shell1 0
RTimothyEdwards/sky130_ef_ip__rc_osc_500k
Medium-speed low-power oscillator (500kHz) with enable.
Language:Shell1 12
RTimothyEdwards/sky130_ef_ip__rheostat_8bit
8-bit programmable rheostat with 50kohm end-to-end resistance, in the sky130 process.
Language:MATLAB1 0
RTimothyEdwards/skywater-pdk-libs-sky130_fd_io
IO and periphery cells for SKY130 provided by SkyWater.
Language:Verilog0 0