Pinned Repositories
automatic-for-Verilog
Automatic generator for Verilog HDL
blogs_code
demo code of my blog
core_sdram_axi4
SDRAM controller with AXI4 interface
DSP_with_FPGAs_ed4
DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
High-Speed-FPGA-based-Data-Acquisition-System-100MSPS
kernel_analysis
Analyze how the numbers in kernel influence sampled image
Kryon
minispartan6
Projects for the Scarab Minispartan6+ FPGA board
nvim
pytorch-YOLOv4
PyTorch ,ONNX and TensorRT implementation of YOLOv4
SH8899's Repositories
SH8899/automatic-for-Verilog
Automatic generator for Verilog HDL
SH8899/blogs_code
demo code of my blog
SH8899/core_sdram_axi4
SDRAM controller with AXI4 interface
SH8899/DSP_with_FPGAs_ed4
DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
SH8899/High-Speed-FPGA-based-Data-Acquisition-System-100MSPS
SH8899/kernel_analysis
Analyze how the numbers in kernel influence sampled image
SH8899/Kryon
SH8899/minispartan6
Projects for the Scarab Minispartan6+ FPGA board
SH8899/nvim
SH8899/pytorch-YOLOv4
PyTorch ,ONNX and TensorRT implementation of YOLOv4
SH8899/tbengy
Python Tool for UVM Testbench Generation
SH8899/verilog-axi
Verilog AXI components for FPGA implementation