SalvatoreDiGirolamo

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

catapult

Deprecated Catapult GitHub. Please instead use http://crbug.com "Speed>Benchmarks" component for bugs and https://chromium.googlesource.com/catapult for downloading and editing source code..

fflib2

pspin-snitch

trace2source

VSCode extension to relate PULP core traces to source files.

tracevis

CLaMPI

Caching Layer for MPI

liblsb

pspin

PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing

SimFS

SimFS: A Virtualizing Simulation Data File System Interface

SalvatoreDiGirolamo/tracevis

SalvatoreDiGirolamo/trace2source

VSCode extension to relate PULP core traces to source files.

SalvatoreDiGirolamo/fflib2

SalvatoreDiGirolamo/axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

SalvatoreDiGirolamo/catapult

Deprecated Catapult GitHub. Please instead use http://crbug.com "Speed>Benchmarks" component for bugs and https://chromium.googlesource.com/catapult for downloading and editing source code..

SalvatoreDiGirolamo/pspin-snitch

SalvatoreDiGirolamo/FSCLAlgorithmTesting

SalvatoreDiGirolamo/gem5

This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.

SalvatoreDiGirolamo/portals4

Portals is a low-level network API for high-performance networking on high-performance computing systems developed by Sandia National Laboratories, Intel Corporation, and the University of New Mexico. The Portals 4 Reference Implementation is a complete implementation of Portals 4, with transport over InfiniBand VERBS and UDP. Shared memory transport is available as an optimization, including Linux KNEM support. The Portals 4 reference implementation is supported on both modern 64 bit Linux and 64 bit Mac OS X. The reference implementation has been developed by Sandia National Laboratories, Intel Corporation, and System Fabric Works. For more information on the Portals 4 standard, please see the Portals 4 page.

SalvatoreDiGirolamo/pulp-riscv-binutils-gdb

SalvatoreDiGirolamo/pulp-riscv-gcc

SalvatoreDiGirolamo/pulp-riscv-gnu-toolchain

SalvatoreDiGirolamo/snitch

Lean but mean RISC-V system!

SalvatoreDiGirolamo/snitch_tracer

SalvatoreDiGirolamo/sst-elements

SST Architectural Simulation Components and Libraries