Pinned Repositories
Multi-Cycle-AES-Encryption
Multi-Cycle AES Encryption Implementation (128, 192 & 256 bit Key Lengths) Using SystemVerilog
FIFO-Verification
RISC-V
UART
Configurable UART Implementation
Floating-Point-FFT-Verilog-Implementation
ModelSim-QuestaSim
SBqM
Safe Bank Queue Manager
Verilog-Tutorial
SamehM20's Repositories
SamehM20/Floating-Point-FFT-Verilog-Implementation
SamehM20/Multi-Cycle-AES-Encryption
Multi-Cycle AES Encryption Implementation (128, 192 & 256 bit Key Lengths) Using SystemVerilog
SamehM20/FIFO-Verification
SamehM20/RISC-V
SamehM20/ModelSim-QuestaSim
SamehM20/Verilog-Tutorial
SamehM20/UART
Configurable UART Implementation
SamehM20/SBqM
Safe Bank Queue Manager