it contains the implementation, synthesis of different Adders written in Verilog
Adders implemented.
- Carry Save Adder
- Carry Lookahead Adder
- Carry Select Adder
- Carry Skip Adder
- Ripple Carry Adder
- Carry increment Adder
And used the best of them to implement a floating-point adder (single precision)
- Truncation is used so there is a relatively large error
- overflow and underflow will raise an error signal