Author : Scriabing
conntect: 1403154226@qq.com
description: simulation src
PDLA stable src
DLA mac:64
L2 64M
Hardware UPDATE: add "199.232.96.133 raw.githubusercontent.com" to /etc/hosts
L2 memory model in soc_interconnect.sv
soc open an AXI master port for dla's data channel and an apb slaver port for dla csb control
TODO
V1 VERSION for simulation
If need,source configs/platform-fpga.sh for fpga version ,and init "__rt_fpga_fc_frequency&__rt_fpga_periph_frequency" in user c code.
According to the modifing pulp ，modify the following documents：
pulp-sdk/pulp-configs/configs/chips/pulp/pulp.json 193
pulp-sdk/runtime/archi/include/archi/chips/pulp/memory_map.h 34
runtime/pulp-rt/rules/pulp/link.ld 6
put .cluster.text into .text section
add customsized section at the last of link.ld(if modifiy the runtime's ld , need to recompile the sdk env,otherwize using pkd/dev/..../link.ld without remaking sdk)
open O0 to prevent gcc from killing customized section
add " atttibute(section("xxxx")) " for code and data(array&struct)