Pinned Repositories
100DaysOfRTL
100 Days of RTL
fpga-hls-examples
Open-Source HLS Examples for Microchip FPGAs
FPGA-JPEG-LS-encoder
An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码器，可实现高压缩率的无损/近无损图像压缩。
fpgasimulation
Example files for the book FPGA SIMULATION
HLS
HLS examples
polarfire-soc-discovery-kit-reference-design
PolarFire SoC Discovery Kit Product Page
scripts-libraries
Set of community add-ons for Altium Designer
UH-JLS
FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器，用来进行无损图像压缩。
yrv-plus
Verilog implementation of RISC-V: RV32IAC plus much of B. 32-bit or 16-bit bus.
Zybo-Z7-20-pcam-5c
forked Digilent Demo
SergeyBekrenyov's Repositories
SergeyBekrenyov/100DaysOfRTL
100 Days of RTL
SergeyBekrenyov/fpga-hls-examples
Open-Source HLS Examples for Microchip FPGAs
SergeyBekrenyov/FPGA-JPEG-LS-encoder
An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码器，可实现高压缩率的无损/近无损图像压缩。
SergeyBekrenyov/fpgasimulation
Example files for the book FPGA SIMULATION
SergeyBekrenyov/HLS
HLS examples
SergeyBekrenyov/polarfire-soc-discovery-kit-reference-design
PolarFire SoC Discovery Kit Product Page
SergeyBekrenyov/scripts-libraries
Set of community add-ons for Altium Designer
SergeyBekrenyov/UH-JLS
FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器，用来进行无损图像压缩。
SergeyBekrenyov/yrv-plus
Verilog implementation of RISC-V: RV32IAC plus much of B. 32-bit or 16-bit bus.
SergeyBekrenyov/Zybo-Z7-20-pcam-5c
forked Digilent Demo