MIPS-Pipelined-CPU
This is a multi-issue MIPS pipeline CPU implemented using Scala, featuring cache, static branch prediction and expection handling capabilities. It has passed all test cases and is empowered by the NJU-MIPS Project.
This is a multi-issue MIPS pipeline CPU implemented using Scala, featuring cache, static branch prediction and expection handling capabilities. It has passed all test cases and is empowered by the NJU-MIPS Project.