Ssavas
PhD in Computer Science and Engineering. Embedded systems, manycore architectures, design automation, dataflow programming.
Switzerland
Pinned Repositories
Cal2Many
Cal2Many-1
fp-division-no-pipeline
IEEE binary 32 floating-point division hardware in Chisel based on Harmonized Parabolic Synthesis with a single stage.
fp-division-pipelined
IEEE binary 32 floating-point division hardware in Chisel based on Harmonized Parabolic Synthesis with 6 pipeline stages.
InvSqrt
Inverse square root hardware with Harmonized Parabolic Synthesis method
orc-apps
Open RVC-CAL Applications
sqrt-no-pipeline
Square root hardware implemented in Chisel with harmonized parabolic synthesis.
sqrt-pipelined
Square root hardware implemented in Chisel with 5 pipeline stages based on harmonized parabolic synthesis.
rocket-chip
A StreamBlocks platform for Rocket-Chip
Ssavas's Repositories
Ssavas/fp-division-pipelined
IEEE binary 32 floating-point division hardware in Chisel based on Harmonized Parabolic Synthesis with 6 pipeline stages.
Ssavas/fp-division-no-pipeline
IEEE binary 32 floating-point division hardware in Chisel based on Harmonized Parabolic Synthesis with a single stage.
Ssavas/sqrt-pipelined
Square root hardware implemented in Chisel with 5 pipeline stages based on harmonized parabolic synthesis.
Ssavas/sqrt-no-pipeline
Square root hardware implemented in Chisel with harmonized parabolic synthesis.
Ssavas/Cal2Many
Ssavas/Cal2Many-1
Ssavas/InvSqrt
Inverse square root hardware with Harmonized Parabolic Synthesis method
Ssavas/orc-apps
Open RVC-CAL Applications