Pinned Repositories
cv32e40x
4 stage, in-order, compute RISC-V core based on the CV32E40P
cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
dummy-coproc
Dummy coprocessor for latency tests
fusesoc
Package manager and build abstraction tool for FPGA/ASIC development
hello-world
a short description
riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
tutoring_hkn
Repository to store and work on the material related to tutoring
x-heep
x-heep private tests
x-heep-docker
This repository contains the dockerfile to build the X-HEEP docker
xcarus-binutils-gdb
GNU RISC-V binutils and GDB with support for NM-Carus custom vector instructions
StMiky's Repositories
StMiky/dummy-coproc
Dummy coprocessor for latency tests
StMiky/tutoring_hkn
Repository to store and work on the material related to tutoring
StMiky/cv32e40x
4 stage, in-order, compute RISC-V core based on the CV32E40P
StMiky/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
StMiky/fusesoc
Package manager and build abstraction tool for FPGA/ASIC development
StMiky/hello-world
a short description
StMiky/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
StMiky/x-heep
x-heep private tests
StMiky/x-heep-docker
This repository contains the dockerfile to build the X-HEEP docker
StMiky/xcarus-binutils-gdb
GNU RISC-V binutils and GDB with support for NM-Carus custom vector instructions