#include <avr/io.h>
#include <avr/interrupt.h>
void initInterrupt() {
GIMSK |= 1 << PCIE; // enable PCINT[0:5] pin change interrupt
PCMSK |= 1 << PCINT1; // configure interrupt at PB1
sei(); // globaly enable interrupts
}
void setup() {
DDRB |= 1 << DDB4; // define PB4 as output
DDRB &= ~ (1 << DDB1); // define PB1 as input
PORTB |= 1 << PB1; // enable pull up resistor at PB1
initInterrupt();
}
ISR(PCINT0_vect) {
PORTB ^= (1 << PB4); // inverse logical level at PB4 / blink
}
void loop() {
// nop
}
#include <avr/io.h>
#include <avr/interrupt.h>
void initInterrupt() {
GIMSK |= 1 << PCIE; // enable PCINT[0:5] pin change interrupt
PCMSK |= 1 << PCINT1; // configure interrupt at PB1
sei(); // globaly enable interrupts
}
void setup() {
DDRB |= 1 << DDB4; // define PB4 as output
DDRB |= 1 << DDB1; // define PB1 as output
initInterrupt();
}
ISR(PCINT0_vect) {
PORTB ^= (1 << PB4); // inverse logical level at PB4 / blink
}
void loop() {
delay(1000);
PORTB ^= 1 << PB1; // switch state at PB1
}
Compared to PCINT[5:0] the interrupt INT0 is also able to interrupt at logical change at pin INT0, but also on falling or rising edge of INT0 and furthermore at low level at INT0. The differnce made the configuration of MCUCR, the MCU Control Register (see datasheet chap. 9.3.1 at page 47). In the following examples interrupt is configured at any logical change at INT0.
#include <avr/io.h>
#include <avr/interrupt.h>
void initInterrupt() {
GIMSK |= 1 << INT0; // enable INT0 interrupt
MCUCR |= 1 << ISC00; // configure INT0 to ..
MCUCR &= ~(1 << ISC01); // .. interrupt at any logical change at INT0
sei(); // globaly enable interrupts
}
void setup() {
DDRB |= 1 << DDB4; // define PB4 as output
DDRB &= ~ (1 << DDB1); // define PB1 as input
PORTB |= 1 << PB1; // enable pull up resistor at PB1
initInterrupt();
}
ISR(INT0_vect) {
PORTB ^= (1 << PB4); // inverse logical level at PB4 / blink
}
void loop() {
// nop
}
#include <avr/io.h>
#include <avr/interrupt.h>
void initInterrupt() {
GIMSK |= 1 << INT0; // enable INT0 interrupt
MCUCR |= 1 << ISC00; // configure INT0 to ..
MCUCR &= ~(1 << ISC01); // .. interrupt at any logical change at INT0
sei(); // globaly enable interrupts
}
void setup() {
DDRB |= 1 << DDB4; // define PB4 as output
DDRB |= 1 << DDB1; // define PB1 as output
initInterrupt();
}
ISR(INT0_vect) {
PORTB ^= (1 << PB4); // inverse logical level at PB4 / blink
}
void loop() {
delay(1000);
PORTB ^= 1 << PB1; // switch state at PB1
}
void setup() {
DDRB |= 1 << DDB0; // define PB0 as output
TCCR0A = 3 << COM0A0| 3 << WGM00;
}
void loop() {
for (int i=-255; i <= 254; i++) {
OCR0A = abs(i);
delay(3);
}
}
Same at PB1
void setup() {
DDRB |= 1 << DDB1; // define PB1 as output
TCCR0A = 3 << COM0B0| 3 << WGM00;
}
void loop() {
for (int i=-255; i <= 254; i++) {
OCR0B = abs(i);
delay(3);
}
}
Please refere to the datasheet of ATtiny13A http://ww1.microchip.com/downloads/en/DeviceDoc/doc8126.pdf.
For example
#include <avr/io.h>
All libraries are found on github https://github.com/vancegroup-mirrors/avr-libc/blob/master/avr-libc/include/avr.
The library defining PORTB, DDRB, PB4, etc. for ATtiny10a is https://github.com/vancegroup-mirrors/avr-libc/blob/master/avr-libc/include/avr/iotn13a.h. Note: You won’t include it directly.
For to have ATtiny13 configure additional board manager URL https://mcudude.github.io/MicroCore/package_MCUdude_MicroCore_index.json.
-
Timer (compare document AVR130: Setup and Use of AVR Timers)
-
timer overflow
-
compare match
-
input capture (if available at ATtiny13a / ATtiny45)
-
Polling of interrupt flags
-
Interrupt controlled Notification
-
Automatic Reaction on Events (if available at ATtiny13a / ATtiny45)
-
-
Sleep Modes
-
Reduce Power Consumption